| Age | Commit message (Expand) | Author |
|---|
| 2021-06-23 | Implement VORN (register) Arm32 instruction (#2396) | gdkchan |
| 2021-05-29 | Add multi-level function table (#2228) | FICTURE7 |
| 2021-05-24 | POWER - Performance Optimizations With Extensive Ramifications (#2286) | riperiperi |
| 2021-03-25 | Add Sqdmulh_Ve & Sqrdmulh_Ve Inst.s with Tests. (#2139) | LDj3SNuD |
| 2021-02-22 | Implement VCNT instruction (#1963) | mageven |
| 2021-01-20 | CPU (A64): Add Fmaxnmp & Fminnmp Scalar Inst.s, Fast & Slow Paths; with Tests... | LDj3SNuD |
| 2021-01-04 | CPU (A64): Add Pmull_V Inst. with Clmul fast path for the "1/2D -> 1Q" varian... | LDj3SNuD |
| 2020-12-17 | Fix Vnmls_S fast path (F64: losing input d value). Fix Vnmla_S & Vnmls_S slow... | LDj3SNuD |
| 2020-12-16 | CPU: Implement VRINTX.F32 | VRINTX.F64 (#1776) | sharmander |
| 2020-12-15 | CPU: Implement VFMA (Vector) (#1762) | sharmander |
| 2020-12-07 | CPU: Implement VFNMA.F32 | F.64 (#1783) | sharmander |
| 2020-12-07 | Add support for guest Fz (Fpcr) mode through host Ftz and Daz (Mxcsr) modes (... | LDj3SNuD |
| 2020-12-03 | CPU: Implement VFNMS.F32/64 (#1758) | sharmander |
| 2020-11-18 | CPU (A64): Add FP16/FP32 fast paths (F16C Intrinsics) for Fcvt_S, Fcvtl_V & F... | LDj3SNuD |
| 2020-11-17 | shader cache: Fix Linux boot issues (#1709) | Mary |
| 2020-08-31 | CPU (A64): Add Scvtf_S_Fixed & Ucvtf_S_Fixed with Tests. (#1492) | LDj3SNuD |
| 2020-08-13 | Fix Vcvt_FI & Vcvt_RM; Add Vfma_S & Vfms_S. Add Tests. (#1471) | LDj3SNuD |
| 2020-08-08 | CPU: This PR fixes Fpscr, among other things. (#1433) | LDj3SNuD |
| 2020-07-19 | Implements some 32-bit instructions (VBIC, VTST, VSRA) (#1192) | Valentin PONS |
| 2020-07-17 | CPU: A32: Fix Vabs_V & Vneg_V (S8, S16, S32 & F32); add Tests. (#1394) | LDj3SNuD |
| 2020-07-17 | CPU: A32: Add Vadd & Vsub Wide (S/U_8/16/32) Inst.s with Test. (#1390) | LDj3SNuD |
| 2020-07-13 | Add Fmax/minv_V & S/Ushl_S Inst.s with Tests. Fix Maxps/d & Minps/d d… (#1335) | LDj3SNuD |
| 2020-07-13 | Add SSE4.2 Path for CRC32, add A32 variant, add tests for non-castagnoli vari... | riperiperi |
| 2020-06-24 | Fix VMVN (immediate), Add VPMIN, VPMAX, VMVN (register) (#1303) | riperiperi |
| 2020-06-16 | Add Profiled Persistent Translation Cache. (#769) | LDj3SNuD |
| 2020-05-27 | Add FMaxNmV & FMinNmV Inst.s with Test. (#1279) | LDj3SNuD |
| 2020-05-04 | Implement a new physical memory manager and replace DeviceMemory (#856) | gdkchan |
| 2020-04-17 | Improve V128 (#1097) | Ficture Seven |
| 2020-03-24 | Add Fcvtas_S/V & Fcvtau_S/V. (#1018) | LDj3SNuD |
| 2020-03-14 | Implement AESMC, AESIMC, AESE, AESD and VEOR AArch32 instructions (#982) | riperiperi |
| 2020-03-11 | Implement VMULL, VMLSL, VRSHR, VQRSHRN, VQRSHRUN AArch32 instructions + other... | gdkchan |
| 2020-03-10 | Implement VMOVL and VORR.I32 AArch32 SIMD instructions (#960) | gdkchan |
| 2020-03-01 | Add SSAT, SSAT16, USAT and USAT16 ARM32 instructions (#954) | gdkchan |
| 2020-03-01 | Implement FACGE and FACGT (Scalar and Vector) AArch64 SIMD instructions (#956) | gdkchan |
| 2020-02-24 | Add most of the A32 instruction set to ARMeilleure (#897) | riperiperi |
| 2019-12-29 | Implemented fast paths for: (#846) | LDj3SNuD |
| 2019-11-14 | Add Mrs & Msr (Nzcv) Inst., with Tests. (#819) | LDj3SNuD |
| 2019-10-24 | Add Sli_S/V & Sri_S/V inst.s (fast & slow paths), with Tests. (#797) | LDj3SNuD |
| 2019-10-04 | Add Tbx Inst. (fast & slow paths), with Tests. (#782) | LDj3SNuD |
| 2019-08-08 | Add a new JIT compiler for CPU code (#693) | gdkchan |
| 2019-07-08 | Add Saddlv_V Inst. Improve Cnt_V, Dup_Gp & Ins_Gp Tests. Tuneup Cls_V & Clz_V... | LDj3SNuD |
| 2019-06-29 | Implement the remaining tests for Simd and Fp instructions of data processing... | LDj3SNuD |
| 2019-06-12 | Implement a custom value generator for the Tests of the CLS and CLZ instructi... | LDj3SNuD |
| 2019-05-30 | Add FCVT <Hd>, <Sn> and FCVT <Sd>, <Hn> Inst.; add Tests. (#692) | LDj3SNuD |
| 2019-05-29 | Add Smaxv_V, Sminv_V, Umaxv_V, Uminv_V Inst.; add Tests. (#691) | LDj3SNuD |
| 2019-04-26 | Sse optimized the Scalar & Vector fp-to-fp conversion instructions (MNPZ & IX... | LDj3SNuD |
| 2019-04-20 | Sse optimized the 32-bit Vector & Scalar integer-to-fp conversion instruction... | LDj3SNuD |
| 2019-04-12 | Sse optimized the Vector & Scalar fp-to-integer conversion instructions (unsi... | LDj3SNuD |
| 2019-04-03 | Sse optimized all the fp to integer conversion instructions (signed) with Tes... | LDj3SNuD |
| 2019-03-23 | Add Tbl_V Sse opt. with Tests. (#651) | LDj3SNuD |
