| Age | Commit message (Expand) | Author |
|---|
| 2021-01-28 | Lower precision of estimate instruction results to match Arm behavior (#1943) | gdkchan |
| 2021-01-26 | Implement PRFM (register variant) as NOP (#1956) | mageven |
| 2021-01-25 | Add VCLZ.* fast path (#1917) | FICTURE7 |
| 2021-01-20 | CPU (A64): Add Fmaxnmp & Fminnmp Scalar Inst.s, Fast & Slow Paths; with Tests... | LDj3SNuD |
| 2021-01-04 | CPU (A64): Add Pmull_V Inst. with Clmul fast path for the "1/2D -> 1Q" varian... | LDj3SNuD |
| 2020-12-17 | Fix Vnmls_S fast path (F64: losing input d value). Fix Vnmla_S & Vnmls_S slow... | LDj3SNuD |
| 2020-12-17 | PPTC Follow-up. (#1712) | LDj3SNuD |
| 2020-12-16 | CPU: Implement VRINTX.F32 | VRINTX.F64 (#1776) | sharmander |
| 2020-12-16 | Clear JIT cache on exit (#1518) | gdkchan |
| 2020-12-15 | CPU: Implement VFMA (Vector) (#1762) | sharmander |
| 2020-12-13 | Fix register read after write on STREX implementation (#1801) | gdkchan |
| 2020-12-07 | CPU: Implement VFNMA.F32 | F.64 (#1783) | sharmander |
| 2020-12-07 | Add support for guest Fz (Fpcr) mode through host Ftz and Daz (Mxcsr) modes (... | LDj3SNuD |
| 2020-12-03 | CPU: Implement VFNMS.F32/64 (#1758) | sharmander |
| 2020-11-18 | CPU (A64): Add FP16/FP32 fast paths (F16C Intrinsics) for Fcvt_S, Fcvtl_V & F... | LDj3SNuD |
| 2020-10-16 | Memory Read/Write Tracking using Region Handles (#1272) | riperiperi |
| 2020-10-13 | Add Umaal & Vabd_I, Vabdl_I, Vaddl_I, Vhadd, Vqshrn, Vshll inst.s (slow paths... | LDj3SNuD |
| 2020-09-22 | IPC refactor part 1: Use explicit separate threads to process requests (#1447) | gdkchan |
| 2020-09-19 | Fix host stack overflow caused by some recursive guest methods. (#1528) | LDj3SNuD |
| 2020-09-19 | Implement block placement (#1549) | FICTURE7 |
| 2020-09-07 | Do not emit StoreToContext before Return (#1537) | FICTURE7 |
| 2020-08-31 | Improve static branch prediction along fast path for memory accesses (#1484) | FICTURE7 |
| 2020-08-31 | CPU (A64): Add Scvtf_S_Fixed & Ucvtf_S_Fixed with Tests. (#1492) | LDj3SNuD |
| 2020-08-13 | Fix Vcvt_FI & Vcvt_RM; Add Vfma_S & Vfms_S. Add Tests. (#1471) | LDj3SNuD |
| 2020-08-08 | CPU: This PR fixes Fpscr, among other things. (#1433) | LDj3SNuD |
| 2020-08-05 | Improve branch operations (#1442) | Ficture Seven |
| 2020-07-30 | Implement inline memory load/store exclusive and ordered (#1413) | gdkchan |
| 2020-07-30 | Print guest stack trace on invalid memory access (#1407) | gdkchan |
| 2020-07-19 | Implements some 32-bit instructions (VBIC, VTST, VSRA) (#1192) | Valentin PONS |
| 2020-07-17 | CPU: A32: Fix Vabs_V & Vneg_V (S8, S16, S32 & F32); add Tests. (#1394) | LDj3SNuD |
| 2020-07-17 | CPU: A32: Add Vadd & Vsub Wide (S/U_8/16/32) Inst.s with Test. (#1390) | LDj3SNuD |
| 2020-07-13 | Add Fmax/minv_V & S/Ushl_S Inst.s with Tests. Fix Maxps/d & Minps/d d… (#1335) | LDj3SNuD |
| 2020-07-13 | Add SSE4.2 Path for CRC32, add A32 variant, add tests for non-castagnoli vari... | riperiperi |
| 2020-06-24 | Fix VMVN (immediate), Add VPMIN, VPMAX, VMVN (register) (#1303) | riperiperi |
| 2020-06-18 | Generalize tail continues (#1298) | Ficture Seven |
| 2020-06-16 | Add Profiled Persistent Translation Cache. (#769) | LDj3SNuD |
| 2020-06-05 | Faster crc32 implementation (#1294) | merry |
| 2020-05-27 | Add FMaxNmV & FMinNmV Inst.s with Test. (#1279) | LDj3SNuD |
| 2020-05-23 | Implement CNTVCT_EL0 (#1268) | mageven |
| 2020-05-14 | Fix RET Xn translation (#1242) | Ficture Seven |
| 2020-05-04 | Implement a new physical memory manager and replace DeviceMemory (#856) | gdkchan |
| 2020-04-17 | Improve V128 (#1097) | Ficture Seven |
| 2020-04-04 | Use the jump table for HighCq tail continues. (#1088) | riperiperi |
| 2020-03-25 | Add Fast Paths for Crypto instructions (A32/A64) (#1026) | riperiperi |
| 2020-03-24 | Add Fcvtas_S/V & Fcvtau_S/V. (#1018) | LDj3SNuD |
| 2020-03-14 | Implement AESMC, AESIMC, AESE, AESD and VEOR AArch32 instructions (#982) | riperiperi |
| 2020-03-12 | Use a Jump Table for direct and indirect calls/jumps, removing transitions to... | riperiperi |
| 2020-03-11 | Implement VMULL, VMLSL, VRSHR, VQRSHRN, VQRSHRUN AArch32 instructions + other... | gdkchan |
| 2020-03-10 | Implement VMOVL and VORR.I32 AArch32 SIMD instructions (#960) | gdkchan |
| 2020-03-05 | Implement Fast Paths for most A32 SIMD instructions (#952) | jduncanator |
