diff options
| author | sharmander <saldabain.dev@gmail.com> | 2020-12-03 14:20:02 -0500 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-12-03 20:20:02 +0100 |
| commit | b479a43939b77b7f6d67f103f1fdc9126466f780 (patch) | |
| tree | b1655fc5a2e40e6bb4d93179d4d1e0f70db44eed /ARMeilleure/Instructions | |
| parent | c00d39b675d0ebf7ebf5be1135addbbee2510d93 (diff) | |
CPU: Implement VFNMS.F32/64 (#1758)
* Add necessary methods / op-code
* Enable Support for FMA Instruction Set
* Add Intrinsics / Assembly Opcodes for VFMSUB231XX.
* Add X86 Instructions for VFMSUB231XX
* Implement VFNMS
* Implement VFNMS Tests
* Add special cases for FMA instructions.
* Update PPTC Version
* Remove unused Op
* Move Check into Assert / Cleanup
* Rename and cleanup
* Whitespace
* Whitespace / Rename
* Re-sort
* Address final requests
* Implement VFMA.F64
* Simplify switch
* Simplify FMA Instructions into their own IntrinsicType.
* Remove whitespace
* Fix indentation
* Change tests for Vfnms -- disable inf / nan
* Move args up, not description ;)
* Undo vfma
* Completely remove vfms code.,
* Fix order of instruction in assembler
Diffstat (limited to 'ARMeilleure/Instructions')
| -rw-r--r-- | ARMeilleure/Instructions/InstEmitSimdArithmetic32.cs | 15 | ||||
| -rw-r--r-- | ARMeilleure/Instructions/InstEmitSimdHelper32.cs | 14 | ||||
| -rw-r--r-- | ARMeilleure/Instructions/InstName.cs | 1 |
3 files changed, 30 insertions, 0 deletions
diff --git a/ARMeilleure/Instructions/InstEmitSimdArithmetic32.cs b/ARMeilleure/Instructions/InstEmitSimdArithmetic32.cs index 0eeed5bb..00e32b9f 100644 --- a/ARMeilleure/Instructions/InstEmitSimdArithmetic32.cs +++ b/ARMeilleure/Instructions/InstEmitSimdArithmetic32.cs @@ -284,6 +284,21 @@ namespace ARMeilleure.Instructions } } + public static void Vfnms_S(ArmEmitterContext context) // Fused. + { + if (Optimizations.FastFP && Optimizations.UseFma) + { + EmitScalarTernaryOpF32(context, Intrinsic.X86Vfmsub231ss, Intrinsic.X86Vfmsub231sd); + } + else + { + EmitScalarTernaryOpF32(context, (op1, op2, op3) => + { + return EmitSoftFloatCall(context, nameof(SoftFloat32.FPMulAdd), context.Negate(op1), op2, op3); + }); + } + } + public static void Vhadd(ArmEmitterContext context) { OpCode32SimdReg op = (OpCode32SimdReg)context.CurrOp; diff --git a/ARMeilleure/Instructions/InstEmitSimdHelper32.cs b/ARMeilleure/Instructions/InstEmitSimdHelper32.cs index a962c0fc..75aa7220 100644 --- a/ARMeilleure/Instructions/InstEmitSimdHelper32.cs +++ b/ARMeilleure/Instructions/InstEmitSimdHelper32.cs @@ -901,6 +901,20 @@ namespace ARMeilleure.Instructions context.Copy(initialD, res); } + public static void EmitScalarTernaryOpF32(ArmEmitterContext context, Intrinsic inst32, Intrinsic inst64) + { + OpCode32SimdRegS op = (OpCode32SimdRegS)context.CurrOp; + + bool doubleSize = (op.Size & 1) != 0; + + Intrinsic inst = doubleSize ? inst64 : inst32; + + EmitScalarTernaryOpSimd32(context, (d, n, m) => + { + return context.AddIntrinsic(inst, d, n, m); + }); + } + public static void EmitScalarTernaryOpF32(ArmEmitterContext context, Intrinsic inst32pt1, Intrinsic inst64pt1, Intrinsic inst32pt2, Intrinsic inst64pt2) { OpCode32SimdRegS op = (OpCode32SimdRegS)context.CurrOp; diff --git a/ARMeilleure/Instructions/InstName.cs b/ARMeilleure/Instructions/InstName.cs index c694bb06..ad70769d 100644 --- a/ARMeilleure/Instructions/InstName.cs +++ b/ARMeilleure/Instructions/InstName.cs @@ -571,6 +571,7 @@ namespace ARMeilleure.Instructions Vext, Vfma, Vfms, + Vfnms, Vhadd, Vld1, Vld2, |