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path: root/ChocolArm64/Instruction/AInstEmitSimdCmp.cs
AgeCommit message (Expand)Author
2018-10-30Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484)Alex Barney
2018-10-23Fix Fcvtl_V and Fcvtn_V; fix half to float conv. and add float to half conv. ...LDj3SNuD
2018-09-26Optimize BIC, BSL, BIT, BIF, XTN, ZIP, DUP (Gp), FMADD (Scalar) and FCVT (Sca...gdkchan
2018-08-14Zero out bits 63:32 of scalar float operations with SSE intrinsics (#273)gdkchan
2018-07-18Implement Ssubw_V and Usubw_V instructions. (#287)LDj3SNuD
2018-07-14Add SMLSL, SQRSHRN and SRSHR (Vector) cpu instructions, nits (#225)gdkchan
2018-06-25Add Sse Opt. for Cmeq_V_2D, Cmgt_V_2D (Reg). Add Sse Opt. for Crc32cb, Crc32c...LDj3SNuD
2018-06-18Add Cmeq_S, Cmge_S, Cmgt_S, Cmhi_S, Cmhs_S, Cmle_S, Cmlt_S (Reg, Zero) & Cmts...LDj3SNuD
2018-05-23Fix wrong type on CMTST instructiongdkchan
2018-05-23Remove some calls generated on the CPU for inexistent intrinsic methodsgdkchan
2018-05-11Add intrinsics support (#121)gdkchan
2018-04-06Fix FRSQRTS and FCM* (scalar) instructionsgdkchan
2018-04-06Add FMLS (vector) instructiongdkchan
2018-04-05Add FRSQRTS and FCM* instructionsgdkchan
2018-03-02Add EXT, CMTST (vector) and UMULL (vector) instructionsgdkchan
2018-02-20Split main project into core,graphics and chocolarm4 subproject (#29)emmauss