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authorLDj3SNuD <35856442+LDj3SNuD@users.noreply.github.com>2018-07-19 02:06:28 +0200
committergdkchan <gab.dark.100@gmail.com>2018-07-18 21:06:28 -0300
commitfa5545aab80c056fa7e1f8d516a5add79eb30d8b (patch)
treebe3d187e7de2658c018e2a38ab5baeca623a5e8d /ChocolArm64/Instruction/AInstEmitSimdCmp.cs
parent120fe6b74a0d2903471bfaeb25ef8265712fc576 (diff)
Implement Ssubw_V and Usubw_V instructions. (#287)
* Update AOpCodeTable.cs * Update AInstEmitSimdHelper.cs * Update AInstEmitSimdArithmetic.cs * Update AInstEmitSimdMove.cs * Update AInstEmitSimdCmp.cs * Update Instructions.cs * Update CpuTestSimd.cs * Update CpuTestSimdReg.cs
Diffstat (limited to 'ChocolArm64/Instruction/AInstEmitSimdCmp.cs')
-rw-r--r--ChocolArm64/Instruction/AInstEmitSimdCmp.cs6
1 files changed, 3 insertions, 3 deletions
diff --git a/ChocolArm64/Instruction/AInstEmitSimdCmp.cs b/ChocolArm64/Instruction/AInstEmitSimdCmp.cs
index 773d9894..c2d47747 100644
--- a/ChocolArm64/Instruction/AInstEmitSimdCmp.cs
+++ b/ChocolArm64/Instruction/AInstEmitSimdCmp.cs
@@ -364,7 +364,7 @@ namespace ChocolArm64.Instruction
AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
int Bytes = Op.GetBitsCount() >> 3;
- int Elems = (!Scalar ? Bytes >> Op.Size : 1);
+ int Elems = !Scalar ? Bytes >> Op.Size : 1;
ulong SzMask = ulong.MaxValue >> (64 - (8 << Op.Size));
@@ -408,7 +408,7 @@ namespace ChocolArm64.Instruction
AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
int Bytes = Op.GetBitsCount() >> 3;
- int Elems = (!Scalar ? Bytes >> Op.Size : 1);
+ int Elems = !Scalar ? Bytes >> Op.Size : 1;
ulong SzMask = ulong.MaxValue >> (64 - (8 << Op.Size));
@@ -522,4 +522,4 @@ namespace ChocolArm64.Instruction
Context.MarkLabel(LblEnd);
}
}
-} \ No newline at end of file
+}