Use a new approach for shader BRX targets (#2532)

* Use a new approach for shader BRX targets

* Make shader cache actually work

* Improve the shader pattern matching a bit

* Extend LDC search to predecessor blocks, catches more cases

* Nit

* Only save the amount of constant buffer data actually used. Avoids crashes on partially mapped buffers

* Ignore Rd on predicate instructions, as they do not have a Rd register (catches more cases)

1 files changed, 6 insertions, 0 deletions

diff --git a/Ryujinx.Graphics.Shader/Instructions/InstEmitFlow.cs b/Ryujinx.Graphics.Shader/Instructions/InstEmitFlow.cs
index d4ab5955..1f5bf35b 100644
--- a/Ryujinx.Graphics.Shader/Instructions/InstEmitFlow.cs
+++ b/Ryujinx.Graphics.Shader/Instructions/InstEmitFlow.cs
@@ -25,6 +25,12 @@ namespace Ryujinx.Graphics.Shader.Instructions
         {
             OpCodeBranchIndir op = (OpCodeBranchIndir)context.CurrOp;
 
+            if (op.PossibleTargets.Count == 0)
+            {
+                context.Config.GpuAccessor.Log($"Failed to find targets for BRX instruction at 0x{op.Address:X}.");
+                return;
+            }
+
             int offset = (int)op.Address + 8 + op.Offset;
 
             Operand address = context.IAdd(Register(op.Ra), Const(offset));