From d9d18439f6900fd9f05bde41998526281f7638c5 Mon Sep 17 00:00:00 2001 From: gdkchan Date: Wed, 11 Aug 2021 15:59:42 -0300 Subject: Use a new approach for shader BRX targets (#2532) * Use a new approach for shader BRX targets * Make shader cache actually work * Improve the shader pattern matching a bit * Extend LDC search to predecessor blocks, catches more cases * Nit * Only save the amount of constant buffer data actually used. Avoids crashes on partially mapped buffers * Ignore Rd on predicate instructions, as they do not have a Rd register (catches more cases) --- Ryujinx.Graphics.Shader/Instructions/InstEmitFlow.cs | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Ryujinx.Graphics.Shader/Instructions') diff --git a/Ryujinx.Graphics.Shader/Instructions/InstEmitFlow.cs b/Ryujinx.Graphics.Shader/Instructions/InstEmitFlow.cs index d4ab5955..1f5bf35b 100644 --- a/Ryujinx.Graphics.Shader/Instructions/InstEmitFlow.cs +++ b/Ryujinx.Graphics.Shader/Instructions/InstEmitFlow.cs @@ -25,6 +25,12 @@ namespace Ryujinx.Graphics.Shader.Instructions { OpCodeBranchIndir op = (OpCodeBranchIndir)context.CurrOp; + if (op.PossibleTargets.Count == 0) + { + context.Config.GpuAccessor.Log($"Failed to find targets for BRX instruction at 0x{op.Address:X}."); + return; + } + int offset = (int)op.Address + 8 + op.Offset; Operand address = context.IAdd(Register(op.Ra), Const(offset)); -- cgit v1.2.3