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| author | riperiperi <rhy3756547@hotmail.com> | 2020-03-13 23:29:58 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-03-14 10:29:58 +1100 |
| commit | dd433c1296bbd82e5e42bf8de1731a4eaadcfdb5 (patch) | |
| tree | a77472d331a7b4af4fd516a5f6de44ca7417376d /ARMeilleure/Instructions/InstEmitSimdLogical32.cs | |
| parent | ff2bac9c9042ef23437b19a32f3f2b6869cc1274 (diff) | |
Implement AESMC, AESIMC, AESE, AESD and VEOR AArch32 instructions (#982)
* Add VEOR and AES instructions.
* Add tests for crypto instructions.
* Update ValueSource name.
Diffstat (limited to 'ARMeilleure/Instructions/InstEmitSimdLogical32.cs')
| -rw-r--r-- | ARMeilleure/Instructions/InstEmitSimdLogical32.cs | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/ARMeilleure/Instructions/InstEmitSimdLogical32.cs b/ARMeilleure/Instructions/InstEmitSimdLogical32.cs index 3698f332..6505e834 100644 --- a/ARMeilleure/Instructions/InstEmitSimdLogical32.cs +++ b/ARMeilleure/Instructions/InstEmitSimdLogical32.cs @@ -55,6 +55,18 @@ namespace ARMeilleure.Instructions } } + public static void Veor_I(ArmEmitterContext context) + { + if (Optimizations.UseSse2) + { + EmitVectorBinaryOpF32(context, Intrinsic.X86Pxor, Intrinsic.X86Pxor); + } + else + { + EmitVectorBinaryOpZx32(context, (op1, op2) => context.BitwiseExclusiveOr(op1, op2)); + } + } + public static void Vorr_I(ArmEmitterContext context) { if (Optimizations.UseSse2) |