From dd433c1296bbd82e5e42bf8de1731a4eaadcfdb5 Mon Sep 17 00:00:00 2001
From: riperiperi <rhy3756547@hotmail.com>
Date: Fri, 13 Mar 2020 23:29:58 +0000
Subject: Implement AESMC, AESIMC, AESE, AESD and VEOR AArch32 instructions
 (#982)

* Add VEOR and AES instructions.

* Add tests for crypto instructions.

* Update ValueSource name.
---
 ARMeilleure/Instructions/InstEmitSimdLogical32.cs | 12 ++++++++++++
 1 file changed, 12 insertions(+)

(limited to 'ARMeilleure/Instructions/InstEmitSimdLogical32.cs')

diff --git a/ARMeilleure/Instructions/InstEmitSimdLogical32.cs b/ARMeilleure/Instructions/InstEmitSimdLogical32.cs
index 3698f332..6505e834 100644
--- a/ARMeilleure/Instructions/InstEmitSimdLogical32.cs
+++ b/ARMeilleure/Instructions/InstEmitSimdLogical32.cs
@@ -55,6 +55,18 @@ namespace ARMeilleure.Instructions
             }
         }
 
+        public static void Veor_I(ArmEmitterContext context)
+        {
+            if (Optimizations.UseSse2)
+            {
+                EmitVectorBinaryOpF32(context, Intrinsic.X86Pxor, Intrinsic.X86Pxor);
+            }
+            else
+            {
+                EmitVectorBinaryOpZx32(context, (op1, op2) => context.BitwiseExclusiveOr(op1, op2));
+            }
+        }
+
         public static void Vorr_I(ArmEmitterContext context)
         {
             if (Optimizations.UseSse2)
-- 
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