diff options
| author | Rodrigo Locatti <reinuseslisp@airmail.cc> | 2020-09-10 02:28:54 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-09-10 02:28:54 +0000 |
| commit | 663ea382dae4b0a8d958753fb370416b1602c55e (patch) | |
| tree | 74db3117e649cb5ae1a265c69f68d2bb03b9d542 /src/video_core/texture_cache/surface_params.cpp | |
| parent | d90961122ca4d3a1c1f452e1d1b3fb14f790334e (diff) | |
| parent | 9e871937250cb92a13336c6c06186c41f19e1738 (diff) | |
Merge pull request #4633 from ReinUsesLisp/gpu-init
video_core: Remove all Core::System references in renderer
Diffstat (limited to 'src/video_core/texture_cache/surface_params.cpp')
| -rw-r--r-- | src/video_core/texture_cache/surface_params.cpp | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/src/video_core/texture_cache/surface_params.cpp b/src/video_core/texture_cache/surface_params.cpp index e614a92df..e8515321b 100644 --- a/src/video_core/texture_cache/surface_params.cpp +++ b/src/video_core/texture_cache/surface_params.cpp @@ -163,13 +163,11 @@ SurfaceParams SurfaceParams::CreateForImage(const FormatLookupTable& lookup_tabl return params; } -SurfaceParams SurfaceParams::CreateForDepthBuffer(Core::System& system) { - const auto& regs = system.GPU().Maxwell3D().regs; - +SurfaceParams SurfaceParams::CreateForDepthBuffer(Tegra::Engines::Maxwell3D& maxwell3d) { + const auto& regs = maxwell3d.regs; const auto block_depth = std::min(regs.zeta.memory_layout.block_depth.Value(), 5U); const bool is_layered = regs.zeta_layers > 1 && block_depth == 0; const auto pixel_format = PixelFormatFromDepthFormat(regs.zeta.format); - return { .is_tiled = regs.zeta.memory_layout.type == Tegra::Engines::Maxwell3D::Regs::InvMemoryLayout::BlockLinear, @@ -191,8 +189,9 @@ SurfaceParams SurfaceParams::CreateForDepthBuffer(Core::System& system) { }; } -SurfaceParams SurfaceParams::CreateForFramebuffer(Core::System& system, std::size_t index) { - const auto& config{system.GPU().Maxwell3D().regs.rt[index]}; +SurfaceParams SurfaceParams::CreateForFramebuffer(Tegra::Engines::Maxwell3D& maxwell3d, + std::size_t index) { + const auto& config{maxwell3d.regs.rt[index]}; SurfaceParams params; params.is_tiled = config.memory_layout.type == Tegra::Engines::Maxwell3D::Regs::InvMemoryLayout::BlockLinear; |
