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authorbunnei <bunneidev@gmail.com>2019-01-29 22:02:01 -0500
committerGitHub <noreply@github.com>2019-01-29 22:02:01 -0500
commit52bb5245268e113bfacc4c4bb27a74ea3058adbc (patch)
tree4ba30f0ad404bd4120dd5b2e4f21193bf03952fd /src/video_core/engines/shader_bytecode.h
parentba38d91fe2e83595533d0da71ecbf24483d05408 (diff)
parent9f803299de3a9c512939ede48654fab838343a8a (diff)
Merge pull request #1960 from ReinUsesLisp/shader-ir-ldg
video_core: Implement LDG through heuristics based on IR
Diffstat (limited to 'src/video_core/engines/shader_bytecode.h')
-rw-r--r--src/video_core/engines/shader_bytecode.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/video_core/engines/shader_bytecode.h b/src/video_core/engines/shader_bytecode.h
index cdef97bc6..9989825f8 100644
--- a/src/video_core/engines/shader_bytecode.h
+++ b/src/video_core/engines/shader_bytecode.h
@@ -208,6 +208,8 @@ enum class UniformType : u64 {
SignedShort = 3,
Single = 4,
Double = 5,
+ Quad = 6,
+ UnsignedQuad = 7,
};
enum class StoreType : u64 {
@@ -785,6 +787,12 @@ union Instruction {
} st_l;
union {
+ BitField<48, 3, UniformType> type;
+ BitField<46, 2, u64> cache_mode;
+ BitField<20, 24, s64> immediate_offset;
+ } ldg;
+
+ union {
BitField<0, 3, u64> pred0;
BitField<3, 3, u64> pred3;
BitField<7, 1, u64> abs_a;