| Age | Commit message (Expand) | Author |
|---|
| 2018-07-12 | AInstEmitSimdCvt: Half-precision to single-precision conversion (#235) | Merry |
| 2018-07-08 | ChocolArm64: More accurate implementation of Frecpe & Frecps (#228) | Merry |
| 2018-07-03 | Add Rbit_V instruction. Add 8 tests (Rbit_V; Rev16_V, Rev32_V, Rev64_V). Impr... | LDj3SNuD |
| 2018-06-30 | Add linux-x64 to RID property to make tests works on linux (#205) | Thomas Guillemard |
| 2018-06-30 | Add Saba_V, Sabal_V, Sabd_V, Sabdl_V, Uaba_V, Uabal_V; Update Uabd_V, Uabdl_V... | LDj3SNuD |
| 2018-06-25 | Add Sqxtun_S, Sqxtun_V with 3 tests. (#188) | LDj3SNuD |
| 2018-06-25 | Add Sse Opt. for Cmeq_V_2D, Cmgt_V_2D (Reg). Add Sse Opt. for Crc32cb, Crc32c... | LDj3SNuD |
| 2018-06-21 | Port from OpenTK.NETCore to OpenTK.NetStandard (#176) | ReinUsesLisp |
| 2018-06-18 | Add Cmeq_S, Cmge_S, Cmgt_S, Cmhi_S, Cmhs_S, Cmle_S, Cmlt_S (Reg, Zero) & Cmts... | LDj3SNuD |
| 2018-06-10 | Rename Ryujinx.Core to Ryujinx.HLE and add a separate project for a future LL... | gdkchan |
| 2018-05-11 | Add intrinsics support (#121) | gdkchan |
| 2018-04-29 | Add Sqxtn_S, Sqxtn_V, Uqxtn_S, Uqxtn_V instructions and Tests (6). (#110) | LDj3SNuD |
| 2018-04-25 | Add Cls_V, Clz_V, Orn_V instructions. Add 18 Tests: And_V, Bic_V, Bif_V, Bit_... | LDj3SNuD |
| 2018-04-21 | Fix Addp_S in AOpCodeTable. Add 5 Tests: ADDP (scalar), ADDP (vector), ADDV. ... | LDj3SNuD |
| 2018-04-20 | Add ADDHN{2}, RADDHN{2}, SUBHN{2}, RSUBHN{2} (vector) instructions. Add 8 Tes... | LDj3SNuD |
| 2018-04-19 | Fix Fmin/max and add vector version, add and modifying fmin/max tests (#89) | MS-DOS1999 |
| 2018-04-18 | Add 151 complete tests for 71 base instructions of types: Alu; AluImm; AluRs;... | LDj3SNuD |
| 2018-04-12 | Add TRN1 & TRN2 (vector) instructions. Add 4 simple tests (4S, 8B). (#77) | LDj3SNuD |
| 2018-04-08 | Add FMUL (scalar, by element) instruction; add FRECPE, FRECPS (scalar & vecto... | LDj3SNuD |
| 2018-04-05 | Implement Frsqrte_S (#72) | Merry |
| 2018-03-23 | Add Frint Instructions and Tests (#62) | MS-DOS1999 |
| 2018-03-12 | Allow more than one process, free resources on process dispose, implement Svc... | gdkchan |
| 2018-03-10 | Allow to enable/disable memory checks even on release mode through the flag, ... | gdkchan |
| 2018-03-09 | Disable memory checks by default, even on debug, move ram memory allocation i... | gdkchan |
| 2018-03-05 | Add Frintx_S, ASRV test, update ADCS, use Assert.Multiple and indent (#44) | MS-DOS1999 |
| 2018-02-27 | Change SvcGetInfo 5 to return actual heap size, remove AMemoryAlloc since it ... | gdkchan |
| 2018-02-25 | Added initial support for function names from symbol table on the cpu with tr... | gdkchan |
| 2018-02-24 | Update ADC test, add WZR/WSP, ADCS, SBCS test (#37) | MS-DOS1999 |
| 2018-02-23 | Add flags parameters in singleOpcode function, and add ADC Test (#36) | MS-DOS1999 |
| 2018-02-23 | Review of cpu tests and creation of a class for mixed cpu tests. (#35) | LDj3SNuD |
| 2018-02-20 | Add ChocolArm64 reference to Ryujinx.Tests | gdkchan |
| 2018-02-20 | Implement Zip1, Zip2 (#25) | Merry |
| 2018-02-19 | Tests: Add Fmax_S test (#23) | Merry |
| 2018-02-18 | Rename ARegisters to AThreadState | gdkchan |
| 2018-02-15 | Add some tests (#18) | Merry |
