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path: root/ChocolArm64/OpCodeTable.cs
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2019-10-31.NET Core 3.0 is here! (#784)LDj3SNuD
* .NET Core 3.0 is here! * Remove IMemoryManager.cs and its references. * Add T Math/F.FusedMultiplyAdd(T, T, T). Nits. * Nit. * Update appveyor.yml * Revert "Resolve Visual Studio build issues" This reverts commit 1772128ce0fc058e6280001aace3a77a7a96897b. * Update SvcTable.cs
2019-07-08Add Saddlv_V Inst. Improve Cnt_V, Dup_Gp & Ins_Gp Tests. Tuneup Cls_V & ↵LDj3SNuD
Clz_V Tests. (#720) * Update PackageReferences. * Improve Cnt_V Test. Tuneup Cls_V & Clz_V Tests. Nit. * Nit. * Improve Dup_Gp & Ins_Gp Tests. * Update for Saddlv_V Inst. * Update for Saddlv_V Inst. * Update for Saddlv_V Inst.
2019-07-02Misc cleanup (#708)Alex Barney
* Fix typos * Remove unneeded using statements * Enforce var style more * Remove redundant qualifiers * Fix some indentation * Disable naming warnings on files with external enum names * Fix build * Mass find & replace for comments with no spacing * Standardize todo capitalization and for/if spacing
2019-06-29Implement the remaining tests for Simd and Fp instructions of data ↵LDj3SNuD
processing type. Small opts. for Fmov_Ftoi/1 & Fmov_Itof/1 Insts. (#709) * Update CpuTestSimdShImm.cs * Update OpCodeTable.cs * Update CpuTestSimdReg.cs * Add Ins_Gp & Ins_V Tests. Improve Smov_S & Umov_S Tests. * Add Bic_Vi & Orr_Vi Tests. * OpTable Fixes for Bic_Vi & Orr_Vi Insts. * Add Saddlv_V & Uaddlv_V Tests. * Nit. * Add Smull_V & Umull_V Tests. Improve Simd Permute Tests. * Nit. * Add Fcsel_S Test. * Add Fnmadd_S, Fnmsub_S & Fnmul_S Tests. * Fmov_V -> Fmov_Vi * OpTable Fixes for Fmov_Si & Fmov_Vi Insts. * Add Fmov_Vi Test. * Add Fmov_S Test. * Add Fmov_Si Test. Add new test category SimdFmov. * Nit. * OpTable Fixes for Fmov_Ftoi/1 & Fmov_Itof/1 Insts. * Small opts. for Fmov_Ftoi/1 & Fmov_Itof/1 Insts. Small simpl. for Smov_S Inst. Remove unnecessary method EmitIntZeroUpperIfNeeded. * Add Fmov_Ftoi/1 & Fmov_Itof/1 Tests.
2019-05-30Add FCVT <Hd>, <Sn> and FCVT <Sd>, <Hn> Inst.; add Tests. (#692)LDj3SNuD
* Update OpCodeTable.cs * Update InstEmitSimdCvt.cs * Update CpuTestSimd.cs * Address PR feedback.
2019-05-29Add Smaxv_V, Sminv_V, Umaxv_V, Uminv_V Inst.; add Tests. (#691)LDj3SNuD
* Update InstEmitSimdHelper.cs * Update InstEmitSimdArithmetic.cs * Update OpCodeTable.cs * Update CpuTestSimd.cs
2019-04-20Sse optimized the 32-bit Vector & Scalar integer-to-fp conversion ↵LDj3SNuD
instructions (signed & unsigned); added the related Gp & V_Fixed Tests (signed & unsigned). (#662) * Update CpuTestSimdCvt.cs * Update CpuTestSimd.cs * Update CpuTestSimdShImm.cs * Update InstEmitSimdCvt.cs * Update OpCodeTable.cs * Update InstEmitSimdCvt.cs
2019-04-03Sse optimized all the fp to integer conversion instructions (signed) with ↵LDj3SNuD
Tests (signed & unsigned). (#655) * Update CpuTestSimdCvt.cs * Update CpuTestSimd.cs * Update CpuTestSimdShImm.cs * Update InstEmitSimdCvt.cs * Update InstEmitSimdMove.cs * Update InstEmitSimdCmp.cs * Update VectorHelper.cs * Update InstEmitSimdHelper.cs * Update OpCodeTable.cs * Update InstEmitSimdCvt.cs * Update InstEmitSimdHelper.cs * Update InstEmitSimdMove.cs
2019-02-23Implement fixed-point variant of the UCVTF and SCVTF instructions (#578)gdkchan
* Add fixed-point variant of the UCVTF instruction * Change encoding of some fixed-point instructions to not allow invalid encodings * Fix Fcvtzu_Gp_Fixed encoding * Add SCVTF (fixed-point GP to Scalar) instruction * Simplify *Fixed encodings
2019-01-29Implement some ARM32 memory instructions and CMP (#565)gdkchan
* Implement ARM32 memory instructions: LDM, LDR, LDRB, LDRD, LDRH, LDRSB, LDRSH, STM, STR, STRB, STRD, STRH (immediate and register + immediate variants), implement CMP (immediate and register shifted by immediate variants) * Rename some opcode classes and flag masks for consistency * Fix a few suboptimal ARM32 codegen issues, only loads should be considered on decoder when checking if Rt == PC, and only NZCV flags should be considered for comparison optimizations * Take into account Rt2 for LDRD instructions aswell when checking if the instruction changes PC * Re-align arm32 instructions on the opcode table
2019-01-29Add Smlal_Ve, Smlsl_Ve, Smull_Ve, Umlal_Ve, Umlsl_Ve, Umull_Ve Inst.; add ↵LDj3SNuD
Tests. Add Sse Opt. for Trn1/2_V and Uzp1/2_V Inst. Nits. (#566) * Update OpCodeTable.cs * Update InstEmitSimdArithmetic.cs * Update InstEmitSimdHelper.cs * Update CpuTestSimdRegElem.cs * Update InstEmitSimdMove.cs * Update InstEmitSimdCvt.cs * Update SoftFallback.cs * Update InstEmitSimdHelper.cs * Update SoftFloat.cs * Update CryptoHelper.cs * Update InstEmitSimdArithmetic.cs * Update InstEmitSimdCmp.cs * Address PR feedback. * Address PR feedback.
2019-01-24Add ARM32 support on the translator (#561)gdkchan
* Remove ARM32 interpreter and add ARM32 support on the translator * Nits. * Rename Cond -> Condition * Align code again * Rename Data to Alu * Enable ARM32 support and handle undefined instructions * Use the IsThumb method to check if its a thumb opcode * Remove another 32-bits check
2018-12-26Fix Frecpe_S/V and Frsqrte_S/V (full FP emu.). Add Sse Opt. & SoftFloat ↵LDj3SNuD
Impl. for Fcmeq/ge/gt/le/lt_S/V (Reg & Zero), Faddp_S/V, Fmaxp_V, Fminp_V Inst.; add Sse Opt. for Shll_V, S/Ushll_V Inst.; improve Sse Opt. for Xtn_V Inst.. Add Tests. (#543) * Update Optimizations.cs * Update InstEmitSimdShift.cs * Update InstEmitSimdHelper.cs * Update InstEmitSimdArithmetic.cs * Update InstEmitSimdMove.cs * Update SoftFloat.cs * Update InstEmitSimdCmp.cs * Update CpuTestSimdShImm.cs * Update CpuTestSimd.cs * Update CpuTestSimdReg.cs * Nit. * Update SoftFloat.cs * Update InstEmitSimdArithmetic.cs * Update InstEmitSimdHelper.cs * Update CpuTestSimd.cs * Explicit some implicit casts. * Simplify some powers; nits. * Update OpCodeTable.cs * Update InstEmitSimdArithmetic.cs * Update CpuTestSimdReg.cs * Update InstEmitSimdArithmetic.cs
2018-12-17Add Frintz_S/V opcode and unit test, correction of some unit tests (#523)MS-DOS1999
* Add Frintz_S/V opcode and unit test, correction of some unit tests * --test * fix code style issue * delete tab
2018-12-10Misc. CPU improvements (#519)gdkchan
* Fix and simplify TranslatorCache * Fix some assignment alignments, remove some unused usings * Changes to ILEmitter, separate it from ILEmitterCtx * Rename ILEmitter to ILMethodBuilder * Rename LdrLit and *_Fix opcodes * Revert TranslatorCache impl to the more performant one, fix a few issues with it * Allow EmitOpCode to be called even after everything has been emitted * Make Emit and AdvanceOpCode private, simplify it a bit now that it starts emiting from the entry point * Remove unneeded temp use * Add missing exit call on TestExclusive * Use better hash * Implement the == and != operators
2018-12-01Fix Sshl_V; Add S/Uqrshl_V, S/Uqshl_V, S/Urshl_V; Add Tests. (#516)LDj3SNuD
* Update OpCodeTable.cs * Update InstEmitSimdShift.cs * Update SoftFallback.cs * Update CpuTestSimdReg.cs * Nit. * Update SoftFallback.cs * Update Optimizations.cs * Update InstEmitSimdLogical.cs * Update InstEmitSimdArithmetic.cs
2018-11-18Add Sse Opt. for S/Umax_V, S/Umin_V, S/Uaddw_V, S/Usubw_V, Fabs_S/V, ↵LDj3SNuD
Fneg_S/V Inst.; for Fcvtl_V, Fcvtn_V Inst.; and for Fcmp_S Inst.. Add/Improve other Sse Opt.. Add Tests. (#496) * Update CpuTest.cs * Update CpuTestSimd.cs * Update CpuTestSimdReg.cs * Update InstEmitSimdCmp.cs * Update SoftFloat.cs * Update InstEmitAluHelper.cs * Update InstEmitSimdArithmetic.cs * Update InstEmitSimdHelper.cs * Update VectorHelper.cs * Update InstEmitSimdCvt.cs * Update InstEmitSimdArithmetic.cs * Update CpuTestSimd.cs * Update InstEmitSimdArithmetic.cs * Update OpCodeTable.cs * Update InstEmitSimdArithmetic.cs * Update InstEmitSimdCmp.cs * Update InstEmitSimdCvt.cs * Update CpuTestSimd.cs * Update CpuTestSimdReg.cs * Create CpuTestSimdFcond.cs * Update OpCodeTable.cs * Update InstEmitSimdMove.cs * Update CpuTestSimdIns.cs * Create CpuTestSimdExt.cs * Nit. * Update PackageReference.
2018-11-01Add Flush-to-zero mode (input, output) to FP instructions (slow paths); ↵LDj3SNuD
update FP Tests. Update Naming Conventions for Tests project. (#489) * Update SoftFloat.cs * Update SoftFallback.cs * Update InstEmitSimdShift.cs * Update InstEmitSimdCvt.cs * Update InstEmitSimdArithmetic.cs * Update CryptoHelper.cs * Update CpuTestSimd.cs * Update CpuTestSimdReg.cs * Update CpuThreadState.cs * Update OpCodeTable.cs * Add files via upload * Nit. * Remove unused using. Nit. * Remove unused using. FZ update. * Nit. * Remove unused using.
2018-10-30Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484)Alex Barney
* Change naming convention for Ryujinx project * Change naming convention for ChocolArm64 project * Fix NaN * Remove unneeded this. from Ryujinx project * Adjust naming from new PRs * Name changes based on feedback * How did this get removed? * Rebasing fix * Change FP enum case * Remove prefix from ChocolArm64 classes - Part 1 * Remove prefix from ChocolArm64 classes - Part 2 * Fix alignment from last commit's renaming * Rename namespaces * Rename stragglers * Fix alignment * Rename OpCode class * Missed a few * Adjust alignment
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