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2018-07-14Improve CountLeadingZeros() algorithm, nits. (#219)LDj3SNuD
* Update AInstEmitSimdArithmetic.cs * Update ASoftFallback.cs * Update ASoftFallback.cs * Update ASoftFallback.cs * Update AInstEmitSimdArithmetic.cs
2018-07-14Add SMLSL, SQRSHRN and SRSHR (Vector) cpu instructions, nits (#225)gdkchan
* Add SMLSL, SQRSHRN and SRSHR (Vector) cpu instructions * Address PR feedback * Address PR feedback * Remove another useless temp var * nit: Alignment * Replace Context.CurrOp.GetBitsCount() with Op.GetBitsCount() * Fix encodings and move flag bit test out of the loop
2018-07-12AInstEmitSimdCvt: Half-precision to single-precision conversion (#235)Merry
2018-07-09Fix ZIP/UZP/TRN instructions when Rd == Rn || Rd == Rm (#239)gdkchan
2018-07-08ChocolArm64: More accurate implementation of Frecpe & Frecps (#228)Merry
* ChocolArm64: More accurate implementation of Frecpe * ChocolArm64: Handle infinities and zeros in Frecps
2018-07-08ASoftFloat: Fix InvSqrtEstimate for negative values (#233)Merry
2018-07-03Remove broken adds/cmn with condition check optimization (#218)gdkchan
2018-07-03Add SMAXP, SMINP, UMAX, UMAXP, UMIN and UMINP cpu instructions (#200)gdkchan
2018-07-03Add Rbit_V instruction. Add 8 tests (Rbit_V; Rev16_V, Rev32_V, Rev64_V). ↵LDj3SNuD
Improve CountSetBits8() algorithm. (#212) * Update AOpCodeTable.cs * Update AInstEmitSimdArithmetic.cs * Update AInstEmitSimdLogical.cs * Update AVectorHelper.cs * Update ASoftFallback.cs * Update Instructions.cs * Update CpuTestSimd.cs * Update CpuTestSimdReg.cs * Improve CountSetBits8() algorithm. * Improve CountSetBits8() algorithm.
2018-06-30Add Saba_V, Sabal_V, Sabd_V, Sabdl_V, Uaba_V, Uabal_V; Update Uabd_V, ↵LDj3SNuD
Uabdl_V. Add 16 tests. (#204) * Update AOpCodeTable.cs * Update AInstEmitSimdArithmetic.cs * Update AInstEmitSimdHelper.cs * Update Instructions.cs * Update CpuTest.cs * Update CpuTestSimd.cs * Update CpuTestSimdReg.cs
2018-06-28Add Sse2 fallback to Vector{Extract|Insert}Single methods on the CPU (#193)gdkchan
2018-06-28Add support for the FMLA (by element/scalar) instruction (#187)gdkchan
* Add support for the FMLA (by element/scalar) instruction * Fix encoding
2018-06-26Implement SvcGetThreadContext3gdkchan
2018-06-25Add Sqxtun_S, Sqxtun_V with 3 tests. (#188)LDj3SNuD
* Update AInstEmitSimdArithmetic.cs * Update Instructions.cs * Update CpuTestSimd.cs
2018-06-25Add Sse Opt. for Cmeq_V_2D, Cmgt_V_2D (Reg). Add Sse Opt. for Crc32cb, ↵LDj3SNuD
Crc32ch, Crc32cw, Crc32cx. Add 10 simple tests for Fcmgt, Fcmge, Fcmeq, Fcmle, Fcmlt (S, V) (Reg, Zero). Add 2 Cnt_V tests. (#183) * Add files via upload * Add files via upload * Add files via upload * CPE * Add EmitSse42Crc32() * Update CpuTestSimdCmp.cs * Update Pseudocode.cs * Update Instructions.cs * Update CpuTestSimd.cs * Update Instructions.cs
2018-06-25Add REV16/32 (vector) instructions and fix REV64gdkchan
2018-06-25Add opcodes SQXTUN_S and SQXTUN_V (#184)Rygnus
* Add SQXTUN_S and SQXTUN_V Part 1/2 of commit * Add SQXTUN_S and SQXTUN_V (2/2) Part 2/2 of commit
2018-06-23Small OpenGL Renderer refactoring (#177)gdkchan
* Call OpenGL functions directly, remove the pfifo thread, some refactoring * Fix PerformanceStatistics calculating the wrong host fps, remove wait event on PFIFO as this wasn't exactly was causing the freezes (may replace with an exception later) * Organized the Gpu folder a bit more, renamed a few things, address PR feedback * Make PerformanceStatistics thread safe * Remove unused constant * Use unlimited update rate for better pref
2018-06-21Fix some thread sync issues (#172)gdkchan
* Fix some thread sync issues * Remove some debug stuff * Ensure that writes to the mutex address clears the exclusive monitor
2018-06-20Rework signed multiplication. Fixed an edge case and passes all tests. (#174)riperiperi
2018-06-18Add Cmeq_S, Cmge_S, Cmgt_S, Cmhi_S, Cmhs_S, Cmle_S, Cmlt_S (Reg, Zero) & ↵LDj3SNuD
Cmtst_S compare instructions. Add 22 compare tests (Scalar, Vector). Add Eor_V, Not_V tests. (#171) * Add files via upload * Add files via upload * Delete CpuTestScalar.cs * Update CpuTestSimdArithmetic.cs
2018-06-18Add the FADDP (scalar) instructiongdkchan
2018-06-13Faster soft implementation of smulh and umulh (#134)riperiperi
* Faster soft implementation of smulh and umulh * smulh: Fixed mul with 0 acting like it had a negative result. * Use compliment for negative smulh result.
2018-06-12Implement Fabs_V (#146)Lordmau5
2018-06-02Fix mistake on astc conversion, make some static methods that shouldn't be ↵gdkchan
public private, remove old commmented out code
2018-05-26Initial work to support AArch32 with a interpreter, plus nvmm stubs (not ↵gdkchan
used for now)
2018-05-23Fix wrong type on CMTST instructiongdkchan
2018-05-23Remove some calls generated on the CPU for inexistent intrinsic methodsgdkchan
2018-05-18Add scalar variants of FCVTZS/FCVTZU, fix a issue on Ryushadergdkchan
2018-05-11Add intrinsics support (#121)gdkchan
* Initial intrinsics support * Update tests to work with the new Vector128 type and intrinsics * Drop SSE4.1 requirement * Fix copy-paste mistake
2018-04-29Add Sqxtn_S, Sqxtn_V, Uqxtn_S, Uqxtn_V instructions and Tests (6). (#110)LDj3SNuD
* Update ILGeneratorEx.cs * Update AOpCodeTable.cs * Update AInstEmitSimdArithmetic.cs * Update CpuTestSimd.cs * Update CpuTestSimdReg.cs * Update CpuTest.cs * Update Pseudocode.cs * Update Instructions.cs * Update AInstEmitSimdArithmetic.cs * Update AInstEmitSimdArithmetic.cs * Update AInstEmitSimdArithmetic.cs
2018-04-25Add Cls_V, Clz_V, Orn_V instructions. Add 18 Tests: And_V, Bic_V, Bif_V, ↵LDj3SNuD
Bit_V, Bsl_V, Cls_V, Clz_V, Orn_V, Orr_V. (#104) * Update AOpCodeTable.cs * Update AInstEmitSimdLogical.cs * Update AInstEmitSimdArithmetic.cs * Update ASoftFallback.cs * Update AInstEmitAlu.cs * Update Pseudocode.cs * Update Instructions.cs * Update CpuTestSimdReg.cs * Update CpuTestSimd.cs
2018-04-24Improved logging (#103)gdkchan
2018-04-22Print guest stack trace on a few points that can throw exceptionsgdkchan
2018-04-22Stub a few services, add support for generating call stacks on the CPUgdkchan
2018-04-20Add ADDHN{2}, RADDHN{2}, SUBHN{2}, RSUBHN{2} (vector) instructions. Add 8 ↵LDj3SNuD
Tests. (#92) * Update AOpCodeTable.cs * Update AInstEmitSimdArithmetic.cs * Update Pseudocode.cs * Update Instructions.cs * Update Bits.cs * Create CpuTestSimd.cs * Create CpuTestSimdReg.cs * Update CpuTestSimd.cs Provide a better supply of input values for the 20 Simd Tests. * Update CpuTestSimdReg.cs Provide a better supply of input values for the 20 Simd Tests. * Update AOpCodeTable.cs * Update AInstEmitSimdArithmetic.cs * Update CpuTestSimd.cs * Update CpuTestSimdReg.cs
2018-04-19Fix Fmin/max and add vector version, add and modifying fmin/max tests (#89)MS-DOS1999
2018-04-18Add ABS (scalar & vector), ADD (scalar), NEG (scalar) instructions. (#88)LDj3SNuD
* Update AOpCodeTable.cs * Update AInstEmitSimdArithmetic.cs * Update AOpCodeTable.cs
2018-04-12Add TRN1 & TRN2 (vector) instructions. Add 4 simple tests (4S, 8B). (#77)LDj3SNuD
* Update AOpCodeTable.cs * Update AInstEmitSimdMove.cs * Update CpuTestSimdMove.cs * Update AInstEmitSimdMove.cs * Update CpuTestSimdMove.cs
2018-04-10[CPU] Fix CNT instructiongdkchan
2018-04-08Add FMUL (scalar, by element) instruction; add FRECPE, FRECPS (scalar & ↵LDj3SNuD
vector) instructions. Add 5 simple tests. (#74) * Update AOpCodeTable.cs * Update AInstEmitSimdArithmetic.cs * Update AInstEmitSimdHelper.cs * Update CpuTestSimdArithmetic.cs * Update AOpCodeTable.cs * Update AInstEmitSimdArithmetic.cs
2018-04-06[CPU] Fail early when the index/size of the vector is invalidgdkchan
2018-04-06Fix FRSQRTS and FCM* (scalar) instructionsgdkchan
2018-04-06Add FMLS (vector) instructiongdkchan
2018-04-05Add FRSQRTS and FCM* instructionsgdkchan
2018-04-05Implement Frsqrte_S (#72)Merry
* Implement Frsqrte_S * Implement Frsqrte_V * Add Frsqrte_S test
2018-04-04Add Faddp (vector) instructiongdkchan
2018-04-04Add FNEG (vector) instructiongdkchan
2018-03-30Fix EXT/Widening instruction carrying garbage values on some cases, fix ABD ↵gdkchan
(it shouldn't accumulate, this is another variation of the instruction)
2018-03-30Add BIT instructiongdkchan
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