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path: root/ChocolArm64/Instruction/AInstEmitSimdCvt.cs
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2018-07-14Add SMLSL, SQRSHRN and SRSHR (Vector) cpu instructions, nits (#225)gdkchan
* Add SMLSL, SQRSHRN and SRSHR (Vector) cpu instructions * Address PR feedback * Address PR feedback * Remove another useless temp var * nit: Alignment * Replace Context.CurrOp.GetBitsCount() with Op.GetBitsCount() * Fix encodings and move flag bit test out of the loop
2018-07-12AInstEmitSimdCvt: Half-precision to single-precision conversion (#235)Merry
2018-05-18Add scalar variants of FCVTZS/FCVTZU, fix a issue on Ryushadergdkchan
2018-05-11Add intrinsics support (#121)gdkchan
* Initial intrinsics support * Update tests to work with the new Vector128 type and intrinsics * Drop SSE4.1 requirement * Fix copy-paste mistake
2018-03-05Add MUL (vector by element), fix FCVTN, make svcs use MakeError toogdkchan
2018-03-05Add FCVTL and FCVTN instruction (no Half support yet), stub SvcClearEventgdkchan
2018-02-23Map heap on heap base region, fix for thread start on homebrew, add FCVTMU ↵gdkchan
and FCVTPU (general) instructions, fix FMOV (higher 64 bits) encodings, improve emit code for FCVT* (general) instructions
2018-02-20Split main project into core,graphics and chocolarm4 subproject (#29)emmauss