aboutsummaryrefslogtreecommitdiff
path: root/ChocolArm64/Instruction/AInstEmitSimdCvt.cs
diff options
context:
space:
mode:
authorgdkchan <gab.dark.100@gmail.com>2018-03-05 16:18:37 -0300
committergdkchan <gab.dark.100@gmail.com>2018-03-05 16:18:37 -0300
commit59d1b2ad83385dad49cf930e826ce0693b9cee2c (patch)
tree3a5cf63453273d8469a63c673dc3929c0d0948fa /ChocolArm64/Instruction/AInstEmitSimdCvt.cs
parent0e343a748d9dcfe50b885b8c0c5e886bc44080ac (diff)
Add MUL (vector by element), fix FCVTN, make svcs use MakeError too
Diffstat (limited to 'ChocolArm64/Instruction/AInstEmitSimdCvt.cs')
-rw-r--r--ChocolArm64/Instruction/AInstEmitSimdCvt.cs5
1 files changed, 5 insertions, 0 deletions
diff --git a/ChocolArm64/Instruction/AInstEmitSimdCvt.cs b/ChocolArm64/Instruction/AInstEmitSimdCvt.cs
index e9702777..b9944e56 100644
--- a/ChocolArm64/Instruction/AInstEmitSimdCvt.cs
+++ b/ChocolArm64/Instruction/AInstEmitSimdCvt.cs
@@ -99,6 +99,11 @@ namespace ChocolArm64.Instruction
EmitVectorInsertF(Context, Op.Rd, Part + Index, 0);
}
}
+
+ if (Op.RegisterSize == ARegisterSize.SIMD64)
+ {
+ EmitVectorZeroUpper(Context, Op.Rd);
+ }
}
public static void Fcvtps_Gp(AILEmitterCtx Context)