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AgeCommit message (Expand)Author
2020-06-16Add Profiled Persistent Translation Cache. (#769)LDj3SNuD
2020-06-14VABS takes one input register, not two. (#1300)riperiperi
2020-06-05Faster crc32 implementation (#1294)merry
2020-05-27Add FMaxNmV & FMinNmV Inst.s with Test. (#1279)LDj3SNuD
2020-05-23Implement CNTVCT_EL0 (#1268)mageven
2020-05-15Unwinding Follow-up. Fix a bug in JitUnwindWindows where ... (#1238)LDj3SNuD
2020-05-15Surface Flinger: Implement GetBufferHistory (#1232)Thog
2020-05-14Fix RET Xn translation (#1242)Ficture Seven
2020-05-13Remove CpuId IR instruction (#1227)gdkchan
2020-05-11Fix tailcall case in EmitterContext (#1235)Ficture Seven
2020-05-10Suppress CS0169 CS0649 warns from HID structs (#1222)mageven
2020-05-04Upgrade projects to C#8 (#1193)Ac_K
2020-05-04Improve IRDumper (#1135)Ficture Seven
2020-05-04Implement a new physical memory manager and replace DeviceMemory (#856)gdkchan
2020-05-01Do not compute dominance information when not in SSA (#1176)Ficture Seven
2020-04-25Do temp constant copy for CompareAndSwap, other improvements to PreAllocator ...gdkchan
2020-04-22Update .NET Core to 3.1, and update NuGet Packages (#1121)Michael Kuklinski
2020-04-21Suppress warnings from fields never used or never assigned (CS0169 and CS0649...Cristallix
2020-04-20Avoid temporaries when pre-allocating Store %x, imm8/16/32 (#1123)Ficture Seven
2020-04-17Improve V128 (#1097)Ficture Seven
2020-04-09Optimize %x ^ %x = 0 (#1094)Ficture Seven
2020-04-04Use the jump table for HighCq tail continues. (#1088)riperiperi
2020-03-25Add Fast Paths for Crypto instructions (A32/A64) (#1026)riperiperi
2020-03-24Add Fcvtas_S/V & Fcvtau_S/V. (#1018)LDj3SNuD
2020-03-20Move the MakeOp to OpCodeTable class, for reduce the use of ConcurrentDiction...Chenj168
2020-03-20Modify TranslatedFunction.GetPointer () to optimize performance (#995)Chenj168
2020-03-18CodeGen Optimisations (LSRA and Translator) (#978)riperiperi
2020-03-14Implement AESMC, AESIMC, AESE, AESD and VEOR AArch32 instructions (#982)riperiperi
2020-03-12Use a Jump Table for direct and indirect calls/jumps, removing transitions to...riperiperi
2020-03-11Implement VMULL, VMLSL, VRSHR, VQRSHRN, VQRSHRUN AArch32 instructions + other...gdkchan
2020-03-10Implement VMOVL and VORR.I32 AArch32 SIMD instructions (#960)gdkchan
2020-03-10Optimize x64 loads and stores using complex addressing modes (#972)gdkchan
2020-03-07A64 SIMD LDP and STP with size = 0b11 is undefined (#971)gdkchan
2020-03-05Implement Fast Paths for most A32 SIMD instructions (#952)jduncanator
2020-03-04Don't decode blocks starting outside mapped memory & undefined instead of thr...gdkchan
2020-03-01Add SSAT, SSAT16, USAT and USAT16 ARM32 instructions (#954)gdkchan
2020-03-01Implement FACGE and FACGT (Scalar and Vector) AArch64 SIMD instructions (#956)gdkchan
2020-02-29Set Undefined instruction emitter for Undefined property on InstDescriptor (#...gdkchan
2020-02-24Add most of the A32 instruction set to ARMeilleure (#897)riperiperi
2020-02-17Replace LinkedList by IntrusiveList to avoid allocations on JIT (#931)gdkchan
2020-02-06Render Profiler in GUI (#854)emmauss
2020-01-13Name all threads (#886)Ac_K
2020-01-13Add a GetSpan method to the memory manager and use it on GPU (#877)gdkchan
2020-01-09Stop memory modification check when a invalid address is foundgdkchan
2020-01-09Add per-source type memory change tracking, simplified state change tracking,...gdk
2020-01-09Initial workgdk
2019-12-29Implemented fast paths for: (#846)LDj3SNuD
2019-12-14Add a limit for the number of instructions in a function (#843)gdkchan
2019-12-07Implemented fast paths for: (#841)LDj3SNuD
2019-11-14Add Mrs & Msr (Nzcv) Inst., with Tests. (#819)LDj3SNuD