Add Fcvtas_S/V & Fcvtau_S/V. (#1018)

3 files changed, 34 insertions, 6 deletions

diff --git a/ARMeilleure/Decoders/OpCodeTable.cs b/ARMeilleure/Decoders/OpCodeTable.cs
index 93234b3f..bddbec9e 100644
--- a/ARMeilleure/Decoders/OpCodeTable.cs
+++ b/ARMeilleure/Decoders/OpCodeTable.cs
@@ -298,7 +298,11 @@ namespace ARMeilleure.Decoders
             SetA64("000111100x1xxxxxxxxx11xxxxxxxxxx", InstName.Fcsel_S,         InstEmit.Fcsel_S,         typeof(OpCodeSimdFcond));
             SetA64("00011110xx10001xx10000xxxxxxxxxx", InstName.Fcvt_S,          InstEmit.Fcvt_S,          typeof(OpCodeSimd));
             SetA64("x00111100x100100000000xxxxxxxxxx", InstName.Fcvtas_Gp,       InstEmit.Fcvtas_Gp,       typeof(OpCodeSimdCvt));
+            SetA64("010111100x100001110010xxxxxxxxxx", InstName.Fcvtas_S,        InstEmit.Fcvtas_S,        typeof(OpCodeSimd));
+            SetA64("0>0011100<100001110010xxxxxxxxxx", InstName.Fcvtas_V,        InstEmit.Fcvtas_V,        typeof(OpCodeSimd));
             SetA64("x00111100x100101000000xxxxxxxxxx", InstName.Fcvtau_Gp,       InstEmit.Fcvtau_Gp,       typeof(OpCodeSimdCvt));
+            SetA64("011111100x100001110010xxxxxxxxxx", InstName.Fcvtau_S,        InstEmit.Fcvtau_S,        typeof(OpCodeSimd));
+            SetA64("0>1011100<100001110010xxxxxxxxxx", InstName.Fcvtau_V,        InstEmit.Fcvtau_V,        typeof(OpCodeSimd));
             SetA64("0x0011100x100001011110xxxxxxxxxx", InstName.Fcvtl_V,         InstEmit.Fcvtl_V,         typeof(OpCodeSimd));
             SetA64("x00111100x110000000000xxxxxxxxxx", InstName.Fcvtms_Gp,       InstEmit.Fcvtms_Gp,       typeof(OpCodeSimdCvt));
             SetA64("x00111100x110001000000xxxxxxxxxx", InstName.Fcvtmu_Gp,       InstEmit.Fcvtmu_Gp,       typeof(OpCodeSimdCvt));
diff --git a/ARMeilleure/Instructions/InstEmitSimdCvt.cs b/ARMeilleure/Instructions/InstEmitSimdCvt.cs
index a790e5bb..49f0365b 100644
--- a/ARMeilleure/Instructions/InstEmitSimdCvt.cs
+++ b/ARMeilleure/Instructions/InstEmitSimdCvt.cs
@@ -98,11 +98,31 @@ namespace ARMeilleure.Instructions
             EmitFcvt_s_Gp(context, (op1) => EmitRoundMathCall(context, MidpointRounding.AwayFromZero, op1));
         }
 
+        public static void Fcvtas_S(ArmEmitterContext context)
+        {
+            EmitFcvt(context, (op1) => EmitRoundMathCall(context, MidpointRounding.AwayFromZero, op1), signed: true, scalar: true);
+        }
+
+        public static void Fcvtas_V(ArmEmitterContext context)
+        {
+            EmitFcvt(context, (op1) => EmitRoundMathCall(context, MidpointRounding.AwayFromZero, op1), signed: true, scalar: false);
+        }
+
         public static void Fcvtau_Gp(ArmEmitterContext context)
         {
             EmitFcvt_u_Gp(context, (op1) => EmitRoundMathCall(context, MidpointRounding.AwayFromZero, op1));
         }
 
+        public static void Fcvtau_S(ArmEmitterContext context)
+        {
+            EmitFcvt(context, (op1) => EmitRoundMathCall(context, MidpointRounding.AwayFromZero, op1), signed: false, scalar: true);
+        }
+
+        public static void Fcvtau_V(ArmEmitterContext context)
+        {
+            EmitFcvt(context, (op1) => EmitRoundMathCall(context, MidpointRounding.AwayFromZero, op1), signed: false, scalar: false);
+        }
+
         public static void Fcvtl_V(ArmEmitterContext context)
         {
             OpCodeSimd op = (OpCodeSimd)context.CurrOp;
@@ -255,7 +275,7 @@ namespace ARMeilleure.Instructions
             }
             else
             {
-                EmitFcvtn(context, signed: true, scalar: true);
+                EmitFcvt(context, (op1) => EmitRoundMathCall(context, MidpointRounding.ToEven, op1), signed: true, scalar: true);
             }
         }
 
@@ -267,7 +287,7 @@ namespace ARMeilleure.Instructions
             }
             else
             {
-                EmitFcvtn(context, signed: true, scalar: false);
+                EmitFcvt(context, (op1) => EmitRoundMathCall(context, MidpointRounding.ToEven, op1), signed: true, scalar: false);
             }
         }
 
@@ -279,7 +299,7 @@ namespace ARMeilleure.Instructions
             }
             else
             {
-                EmitFcvtn(context, signed: false, scalar: true);
+                EmitFcvt(context, (op1) => EmitRoundMathCall(context, MidpointRounding.ToEven, op1), signed: false, scalar: true);
             }
         }
 
@@ -291,7 +311,7 @@ namespace ARMeilleure.Instructions
             }
             else
             {
-                EmitFcvtn(context, signed: false, scalar: false);
+                EmitFcvt(context, (op1) => EmitRoundMathCall(context, MidpointRounding.ToEven, op1), signed: false, scalar: false);
             }
         }
 
@@ -585,7 +605,7 @@ namespace ARMeilleure.Instructions
             }
         }
 
-        private static void EmitFcvtn(ArmEmitterContext context, bool signed, bool scalar)
+        private static void EmitFcvt(ArmEmitterContext context, Func1I emit, bool signed, bool scalar)
         {
             OpCodeSimd op = (OpCodeSimd)context.CurrOp;
 
@@ -604,7 +624,7 @@ namespace ARMeilleure.Instructions
             {
                 Operand ne = context.VectorExtract(type, n, index);
 
-                Operand e = EmitRoundMathCall(context, MidpointRounding.ToEven, ne);
+                Operand e = emit(ne);
 
                 if (sizeF == 0)
                 {
diff --git a/ARMeilleure/Instructions/InstName.cs b/ARMeilleure/Instructions/InstName.cs
index e217c6ec..9f5600ab 100644
--- a/ARMeilleure/Instructions/InstName.cs
+++ b/ARMeilleure/Instructions/InstName.cs
@@ -180,7 +180,11 @@ namespace ARMeilleure.Instructions
         Fcsel_S,
         Fcvt_S,
         Fcvtas_Gp,
+        Fcvtas_S,
+        Fcvtas_V,
         Fcvtau_Gp,
+        Fcvtau_S,
+        Fcvtau_V,
         Fcvtl_V,
         Fcvtms_Gp,
         Fcvtmu_Gp,