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2020-05-23Implement CNTVCT_EL0 (#1268)mageven
* Implement CNTVCT_EL0 * Fix comment
2020-05-15Unwinding Follow-up. Fix a bug in JitUnwindWindows where ... (#1238)LDj3SNuD
... in case of "Vector" unwind codes the remaining unwind codes could be corrupted. Nits.
2020-05-15Surface Flinger: Implement GetBufferHistory (#1232)Thog
* Surface Flinger: Implement GetBufferHistory Also fix some bugs on the Surface Flinger implementation * Address Ac_K's comment
2020-05-14Fix RET Xn translation (#1242)Ficture Seven
2020-05-13Remove CpuId IR instruction (#1227)gdkchan
2020-05-11Fix tailcall case in EmitterContext (#1235)Ficture Seven
2020-05-10Suppress CS0169 CS0649 warns from HID structs (#1222)mageven
Also fix typo in a pragma restore in Logger
2020-05-04Upgrade projects to C#8 (#1193)Ac_K
Some parts of our code needs C# 8 who isn't set as default in Visual Studio. To fix this we have to set the C# version correctly in the csproj files and then we are be able to build the project using Visual Studio.
2020-05-04Improve IRDumper (#1135)Ficture Seven
* Improve IRDumper * Make Symbols.Add(ulong, ulong, ulong, string) thread safe * Use a StringBuilder for MemoryOperand * Add #if M_DEBUG guards * Fix JMP_TABLE typo * Fix using in Symbols * Use Conditional("M_DEBUG") instead Address gdkchan's feedback * Use a struct instead of 4-tuple Address gdkchan's feedback * Place symbols in comments instead Address gdkchan's feedback * Use StringBuilder throughout * Handle offsetted symbols * Fix naming convention of Builder * Avoid ArgumentException * Remove unnecessary using * Use switch expression instead * Turn into a class * Clean up * Remove unnecessary using
2020-05-04Implement a new physical memory manager and replace DeviceMemory (#856)gdkchan
* Implement a new physical memory manager and replace DeviceMemory * Proper generic constraints * Fix debug build * Add memory tests * New CPU memory manager and general code cleanup * Remove host memory management from CPU project, use Ryujinx.Memory instead * Fix tests * Document exceptions on MemoryBlock * Fix leak on unix memory allocation * Proper disposal of some objects on tests * Fix JitCache not being set as initialized * GetRef without checks for 8-bits and 16-bits CAS * Add MemoryBlock destructor * Throw in separate method to improve codegen * Address PR feedback * QueryModified improvements * Fix memory write tracking not marking all pages as modified in some cases * Simplify MarkRegionAsModified * Remove XML doc for ghost param * Add back optimization to avoid useless buffer updates * Add Ryujinx.Cpu project, move MemoryManager there and remove MemoryBlockWrapper * Some nits * Do not perform address translation when size is 0 * Address PR feedback and format NativeInterface class * Remove ghost parameter description * Update Ryujinx.Cpu to .NET Core 3.1 * Address PR feedback * Fix build * Return a well defined value for GetPhysicalAddress with invalid VA, and do not return unmapped ranges as modified * Typo
2020-05-01Do not compute dominance information when not in SSA (#1176)Ficture Seven
2020-04-25Do temp constant copy for CompareAndSwap, other improvements to PreAllocator ↵gdkchan
(#1126) * Do temp constant copy for CompareAndSwap, other improvements to PreAllocator * Nit
2020-04-22Update .NET Core to 3.1, and update NuGet Packages (#1121)Michael Kuklinski
* Updated all NuGet packages to latest, and updated the framework from .NET Core 3.0 to 3.1. * Updating appveyor settings for 3.1 Updating appveyor to use the netcoreapp3.1 path instead of 3.0. * Removing unneeded NuGet package System.Runtime.CompilerServices.Unsafe. * Removing unused NuGet package SharpFontCore. * Removing unused NuGet package TimeZoneConverter.Posix * Cleaning up by adding newline to a csproj. * Simplfying a NuGet conditional include, and adding a warning disable for an annoying NuGet package. * I'm not sure if .travis.yml is still used, but I'm updating its 'dotnet' version to the correct SDK. * Making the runtime version into its own environment variable so it's a bit easier to change in the future. * Removing OpenTK.NetStandard reference from Ryujinx.Common * Fixing indentation in Common.csproj * Updating the README to specify .NET Core 3.1. * Reverting the update of the GTKSharp package so it doesn't block the PR.
2020-04-21Suppress warnings from fields never used or never assigned (CS0169 and ↵Cristallix
CS0649) (#919) * chore : disable unwanted warnings and minor code cleanup * chore : remove more warnings * fix : reorder struct correctly * fix : restore _isKernel and remove useless comment * fix : copy/paste error * fix : restore CallMethod call * fix : whitespace * chore : clean using * feat : remove warnings * fix : simplify warning removal on struct * fix : revert fields deletion and code clean up * fix : re-add RE value * fix : typo
2020-04-20Avoid temporaries when pre-allocating Store %x, imm8/16/32 (#1123)Ficture Seven
2020-04-17Improve V128 (#1097)Ficture Seven
* Improve V128 * Use LayoutKind.Sequential instead * Add As<T>, Get<T> & Set<T> * Fix CpuTest * Rename Get<T> & Set<T> to Extract<T> & Insert<T> * Add XML documentation * Nit
2020-04-09Optimize %x ^ %x = 0 (#1094)Ficture Seven
* JIT: Optimize %x ^ %x = 0 * Address feedback * Fix typo
2020-04-04Use the jump table for HighCq tail continues. (#1088)riperiperi
* Use the jump table for tail continues. This path is always reached when a function larger than our current length limit (currently 5000) is compiled. * Use Call Flag rather than 1L
2020-03-25Add Fast Paths for Crypto instructions (A32/A64) (#1026)riperiperi
* Add Fast Paths for Crypto instructions (A32/A64) * Replace additional XOR with passing in const zero.
2020-03-24Add Fcvtas_S/V & Fcvtau_S/V. (#1018)LDj3SNuD
2020-03-20Move the MakeOp to OpCodeTable class, for reduce the use of ↵Chenj168
ConcurrentDictionary (#996)
2020-03-20Modify TranslatedFunction.GetPointer () to optimize performance (#995)Chenj168
* add local var to reduce calling Marshal.GetFunctionPointerForDelegate * modify code style
2020-03-18CodeGen Optimisations (LSRA and Translator) (#978)riperiperi
* Start of JIT garbage collection improvements - thread static pool for Operand, MemoryOperand, Operation - Operands and Operations are always to be constructed via their static helper classes, so they can be pooled. - removing LinkedList from Node for sources/destinations (replaced with List<>s for now, but probably could do arrays since size is bounded) - removing params constructors from Node - LinkedList<> to List<> with Clear() for Operand assignments/uses - ThreadStaticPool is very simple and basically just exists for the purpose of our specific translation allocation problem. Right now it will stay at the worst case allocation count for that thread (so far) - the pool can never shrink. - Still some cases of Operand[] that haven't been removed yet. Will need to evaluate them (eg. is there a reasonable max number of params for Calls?) * ConcurrentStack instead of ConcurrentQueue for Rejit * Optimize some parts of LSRA - BitMap now operates on 64-bit int rather than 32-bit - BitMap is now pooled in a ThreadStatic pool (within lrsa) - BitMap now is now its own iterator. Marginally speeds up iterating through the bits. - A few cases where enumerators were generated have been converted to forms that generate less garbage. - New data structure for sorting _usePositions in LiveIntervals. Much faster split, NextUseAfter, initial insertion. Random insertion is slightly slower. - That last one is WIP since you need to insert the values backwards. It would be ideal if it just flipped it for you, uncomplicating things on the caller side. * Use a static pool of thread static pools. (yes.) Prevents each execution thread creating its own lowCq pool and making me cry. * Move constant value to top, change naming convention. * Fix iteration of memory operands. * Increase max thread count. * Address Feedback
2020-03-14Implement AESMC, AESIMC, AESE, AESD and VEOR AArch32 instructions (#982)riperiperi
* Add VEOR and AES instructions. * Add tests for crypto instructions. * Update ValueSource name.
2020-03-12Use a Jump Table for direct and indirect calls/jumps, removing transitions ↵riperiperi
to managed (#975) * Implement Jump Table for Native Calls NOTE: this slows down rejit considerably! Not recommended to be used without codegen optimisation or AOT. - Does not work on Linux - A32 needs an additional commit. * A32 Support (WIP) * Actually write Direct Call pointers to the table That would help. * Direct Calls: Rather than returning to the translator, attempt to keep within the native stack frame. A return to the translator can still happen, but only by exceptionally bubbling up to it. Also: - Always translate lowCq as a function. Faster interop with the direct jumps, and this will be useful in future if we want to do speculative translation. - Tail Call Detection: after the decoding stage, detect if we do a tail call, and avoid translating into it. Detected if a jump is made to an address outwith the contiguous sequence of blocks surrounding the entry point. The goal is to reduce code touched by jit and rejit. * A32 Support * Use smaller max function size for lowCq, fix exceptional returns When a return has an unexpected value and there is no code block following this one, we now return the value rather than continuing. * CompareAndSwap (buggy) * Ensure CompareAndSwap does not get optimized away. * Use CompareAndSwap to make the dynamic table thread safe. * Tail call for linux, throw on too many arguments. * Combine CompareAndSwap 128 and 32/64. They emit different IR instructions since their PreAllocator behaviour is different, but now they just have one function on EmitterContext. * Fix issues separating from optimisations. * Use a stub to find and execute missing functions. This allows us to skip doing many runtime comparisons and branches, and reduces the amount of code we need to emit significantly. For the indirect call table, this stub also does the work of moving in the highCq address to the table when one is found. * Make Jump Tables and Jit Cache dynmically resize Reserve virtual memory, commit as needed. * Move TailCallRemover to its own class. * Multithreaded Translation (based on heuristic) A poor one, at that. Need to get core count for a better one, which means a lot of OS specific garbage. * Better priority management for background threads. * Bound core limit a bit more Past a certain point the load is not paralellizable and starts stealing from the main thread. Likely due to GC, memory, heap allocation thread contention. Reduce by one core til optimisations come to improve the situation. * Fix memory management on linux. * Temporary solution to some sync problems. This will make sure threads exit correctly, most of the time. There is a potential race where setting the sync counter to 0 does nothing (counter stays at what it was before, thread could take too long to exit), but we need to find a better way to do this anyways. Synchronization frequency has been tightened as we never enter blockwise segments of code. Essentially this means, check every x functions or loop iterations, before lowcq blocks existed and were worth just as much. Ideally it should be done in a better way, since functions can be anywhere from 1 to 5000 instructions. (maybe based on host timer, or an interrupt flag from a scheduler thread) * Address feedback minus CompareAndSwap change. * Use default ReservedRegion granularity. * Merge CompareAndSwap with its V128 variant. * We already got the source, no need to do it again. * Make sure all background translation threads exit. * Fix CompareAndSwap128 Detection criteria was a bit scuffed. * Address Comments.
2020-03-11Implement VMULL, VMLSL, VRSHR, VQRSHRN, VQRSHRUN AArch32 instructions + ↵gdkchan
other fixes (#977) * Implement VMULL, VMLSL, VQRSHRN, VQRSHRUN AArch32 instructions plus other fixes * Re-align opcode table * Re-enable undefined, use subclasses to fix checks * Add test and fix VRSHR instruction * PR feedback
2020-03-10Implement VMOVL and VORR.I32 AArch32 SIMD instructions (#960)gdkchan
* Implement VMOVL and VORR.I32 AArch32 SIMD instructions * Rename <dt> to <size> on test description * Rename Widen to Long and improve VMOVL implementation a bit
2020-03-10Optimize x64 loads and stores using complex addressing modes (#972)gdkchan
* Optimize x64 loads and stores using complex addressing modes * This was meant to be used for testing
2020-03-07A64 SIMD LDP and STP with size = 0b11 is undefined (#971)gdkchan
2020-03-05Implement Fast Paths for most A32 SIMD instructions (#952)jduncanator
* Begin work on A32 SIMD Intrinsics * More instructions, some cleanup. * Intrinsics for Move instructions (zip etc) These pass the existing tests. * Intrinsics for some of Cvt While doing this I noticed that the conversion for int/fp was incorrect in the slow path. I'll fix this in the original repo. * Intrinsics for more Arithmetic instructions. * Intrinsics for Vext * Fix VEXT Intrinsic for double words. * Use InsertPs to move scalar values. * Cleanup, fix VPADD.f32 and VMIN signed integer. * Cleanup, add SSE2 support for scalar insert. Works similarly to the IR scalar insert, but obviously this one works directly on V128. * Minor cleanup. * Enable intrinsic for FP64 to integer conversion. * Address feedback apart from splitting out intrinsic float abs Also: bad VREV encodings as undefined rather than throwing in translation. * Move float abs to helper, fix bug with cvt * Rename opc2 & 3 to match A32 docs, use ArgumentOutOfRangeException appropriately. * Get name of variable at compilation rather than string literal. * Use correct double sign mask.
2020-03-04Don't decode blocks starting outside mapped memory & undefined instead of ↵gdkchan
throw on invalid sysreg coprocessor (#964) * Don't decode blocks in invalid memory locations. * Emit undefined instruction on invalid coprocessor ...rather than throwing. * Call undefined instruction directly.
2020-03-01Add SSAT, SSAT16, USAT and USAT16 ARM32 instructions (#954)gdkchan
* Implement SMULWB, SMULWT, SMLAWB, SMLAWT, and add tests for some multiply instructions * Improve test descriptions * Rename SMULH to SMUL__ * Add SSAT, SSAT16, USAT and USAT16 ARM32 instructions * Fix new tests * Replace AND 0xFFFF with 16-bits zero extension (more efficient)
2020-03-01Implement FACGE and FACGT (Scalar and Vector) AArch64 SIMD instructions (#956)gdkchan
2020-02-29Set Undefined instruction emitter for Undefined property on InstDescriptor ↵gdkchan
(#957)
2020-02-24Add most of the A32 instruction set to ARMeilleure (#897)riperiperi
* Implement TEQ and MOV (Imm16) * Initial work on A32 instructions + SVC. No tests yet, hangs in rtld. * Implement CLZ, fix BFI and BFC Now stops on SIMD initialization. * Exclusive access instructions, fix to mul, system instructions. Now gets to a break after SignalProcessWideKey64. * Better impl of UBFX, add UDIV and SDIV Now boots way further - now stuck on VMOV instruction. * Many more instructions, start on SIMD and testing framework. * Fix build issues * svc: Rework 32 bit codepath Fixing once and for all argument ordering issues. * Fix 32 bits stacktrace * hle debug: Add 32 bits dynamic section parsing * Fix highCq mode, add many tests, fix some instruction bugs Still suffers from critical malloc failure :weary: * Fix incorrect opcode decoders and a few more instructions. * Add a few instructions and fix others. re-disable highCq for now. Disabled the svc memory clear since i'm not sure about it. * Fix build * Fix typo in ordered/exclusive stores. * Implement some more instructions, fix others. Uxtab16/Sxtab16 are untested. * Begin impl of pairwise, some other instructions. * Add a few more instructions, a quick hack to fix svcs for now. * Add tests and fix issues with VTRN, VZIP, VUZP * Add a few more instructions, fix Vmul_1 encoding. * Fix way too many instruction bugs, add tests for some of the more important ones. * Fix HighCq, enable FastFP paths for some floating point instructions (not entirely sure why these were disabled, so important to note this commit exists) Branching has been removed in A32 shifts until I figure out if it's worth it * Cleanup Part 1 There should be no functional change between these next few commits. Should is the key word. (except for removing break handler) * Implement 32 bits syscalls Co-authored-by: riperiperi <rhy3756547@hotmail.com> Implement all 32 bits counterparts of the 64 bits syscalls we currently have. * Refactor part 2: Move index/subindex logic to Operand May have inadvertently fixed one (1) bug * Add FlushProcessDataCache32 * Address jd's comments * Remove 16 bit encodings from OpCodeTable Still need to catch some edge cases (operands that use the "F" flag) and make Q encodings with non-even indexes undefined. * Correct Fpscr handling for FP vector slow paths WIP * Add StandardFPSCRValue behaviour for all Arithmetic instructions * Add StandardFPSCRValue behaviour to compare instructions. * Force passing of fpcr to FPProcessException and FPUnpack. Reduces potential for code error significantly * OpCode cleanup * Remove urgency from DMB comment in MRRC DMB is currently a no-op via the instruction, so it should likely still be a no-op here. * Test Cleanup * Fix FPDefaultNaN on Ryzen CPUs * Improve some tests, fix some shift instructions, add slow path for Vadd * Fix Typo * More test cleanup * Flip order of Fx and index, to indicate that the operand's is the "base" * Remove Simd32 register type, use Int32 and Int64 for scalars like A64 does. * Reintroduce alignment to DecoderHelper (removed by accident) * One more realign as reading diffs is hard * Use I32 registers in A32 (part 2) Swap default integer register type based on current execution mode. * FPSCR flags as Registers (part 1) Still need to change NativeContext and ExecutionContext to allow getting/setting with the flag values. * Use I32 registers in A32 (part 1) * FPSCR flags as registers (part 2) Only CMP flags are on the registers right now. It could be useful to use more of the space in non-fast-float when implementing A32 flags accurately in the fast path. * Address Feedback * Correct FP->Int behaviour (should saturate) * Make branches made by writing to PC eligible for Rejit Greatly improves performance in most games. * Remove unused branching for Vtbl * RejitRequest as a class rather than a tuple Makes a lot more sense than storing tuples on a dictionary. * Add VMOVN, VSHR (imm), VSHRN (imm) and related tests * Re-order InstEmitSystem32 Alphabetical sorting. * Address Feedback Feedback from Ac_K, remove and sort usings. * Address Feedback 2 * Address Feedback from LDj3SNuD Opcode table reordered to have alphabetical sorting within groups, Vmaxnm and Vminnm have split names to be less ambiguous, SoftFloat nits, Test nits and Test simplification with ValueSource. * Add Debug Asserts to A32 helpers Mainly to prevent the shift ones from being used on I64 operands, as they expect I32 input for most operations (eg. carry flag setting), and expect I32 input for shift and boolean amounts. Most other helper functions don't take Operands, throw on out of range values, and take specific types of OpCode, so didn't need any asserts. * Use ConstF rather than creating an operand. (useful for pooling in future) * Move exclusive load to helper, reference call flag rather than literal 1. * Address LDj feedback (minus table flatten) one final look before it's all gone. the world is so beautiful. * Flatten OpCodeTable oh no * Address more table ordering * Call Flag as int on A32 Co-authored-by: Natalie C. <cyuubiapps@gmail.com> Co-authored-by: Thog <thog@protonmail.com>
2020-02-17Replace LinkedList by IntrusiveList to avoid allocations on JIT (#931)gdkchan
* Replace LinkedList by IntrusiveList to avoid allocations on JIT * Fix wrong replacements
2020-02-06Render Profiler in GUI (#854)emmauss
* move profiler output to gui * addressed commits, rebased * removed whitespaces
2020-01-13Name all threads (#886)Ac_K
* Name all threads Close #874 * use ThreadName instead of ThreadId in Logging
2020-01-13Add a GetSpan method to the memory manager and use it on GPU (#877)gdkchan
2020-01-09Stop memory modification check when a invalid address is foundgdkchan
2020-01-09Add per-source type memory change tracking, simplified state change ↵gdk
tracking, other fixes
2020-01-09Initial workgdk
2019-12-29Implemented fast paths for: (#846)LDj3SNuD
* opt * Nit. * opt_p2 * Nit.
2019-12-14Add a limit for the number of instructions in a function (#843)gdkchan
2019-12-07Implemented fast paths for: (#841)LDj3SNuD
* cpu-misc_opt * B = ~b * ;
2019-11-14Add Mrs & Msr (Nzcv) Inst., with Tests. (#819)LDj3SNuD
* Add Mrs & Msr (Nzcv) Inst., with Tests. * Don't use `NativeInterface`.
2019-11-09Fix Fcmge_S/V & Fcmgt_S/V Inst.s (#815)LDj3SNuD
* Fix Fcmge_S/V & Fcmgt_S/V. Follow-up Fcm**_S/V & Fc*mp*_S. Improve CmpCondition enum. Nits. * Optimize Fccmp*_S & Fcmp*_S. * Fix cvtsd2si opcode. * Address PR feedback.
2019-10-31.NET Core 3.0 is here! (#784)LDj3SNuD
* .NET Core 3.0 is here! * Remove IMemoryManager.cs and its references. * Add T Math/F.FusedMultiplyAdd(T, T, T). Nits. * Nit. * Update appveyor.yml * Revert "Resolve Visual Studio build issues" This reverts commit 1772128ce0fc058e6280001aace3a77a7a96897b. * Update SvcTable.cs
2019-10-24Add Sli_S/V & Sri_S/V inst.s (fast & slow paths), with Tests. (#797)LDj3SNuD
* Add Sli & Sri. * Add scalar variants.
2019-10-22Resolve Visual Studio build issuesjduncanator
Visual Studio defaults to a C# version of "latest major". Some of the new projects require C# 7.1 features.