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AgeCommit message (Expand)Author
2021-10-18Add an early `TailMerge` pass (#2721)FICTURE7
2021-10-08Optimize LSRA (#2563)FICTURE7
2021-10-05Add `Operand.Label` support to `Assembler` (#2680)FICTURE7
2021-09-29Replace CacheResourceWrite with more general "precise" write (#2684)riperiperi
2021-09-29Optimize `HybridAllocator` (#2637)FICTURE7
2021-09-29Use normal memory store path for DC ZVA (#2693)riperiperi
2021-09-29Fix PTC count table relocation patching (#2666)FICTURE7
2021-09-14Refactor `PtcInfo` (#2625)FICTURE7
2021-09-11Implement a "Pause Emulation" option & hotkey (#2428)mpnico
2021-08-27Implement MSR instruction for A32 (#2585)Mary
2021-08-20Fix type mismatch in `BitwiseAnd` simplification (#2571)FICTURE7
2021-08-17Reduce JIT GC allocations (#2515)FICTURE7
2021-06-23Implement VORN (register) Arm32 instruction (#2396)gdkchan
2021-05-29Add multi-level function table (#2228)FICTURE7
2021-05-24POWER - Performance Optimizations With Extensive Ramifications (#2286)riperiperi
2021-05-24Improve accuracy of reciprocal step instructions (#2305)gdkchan
2021-05-20Use branch instead of tailcall for recursive calls (#2282)FICTURE7
2021-05-20Add `BIC/ORR Vd.T, #imm` fast path (#2279)FICTURE7
2021-05-17Allow `LocalVariable` to be assigned more than once (#2288)FICTURE7
2021-05-13Fold constant offsets and group constant addresses (#2285)gdkchan
2021-05-13PPTC meets ExeFS Patching. (#1865)LDj3SNuD
2021-04-18Add inlined on translation call counting (#2190)FICTURE7
2021-04-13PPTC vs. giant ExeFS. (#2168)LDj3SNuD
2021-04-07(CPU) Fix CRC32 instruction when constant values are used as input (#2183)gdkchan
2021-04-02Improve `StoreToContext` emission (#2155)FICTURE7
2021-04-02Reduce allocation during SSA construction (#2162)FICTURE7
2021-03-25Add Sqdmulh_Ve & Sqrdmulh_Ve Inst.s with Tests. (#2139)LDj3SNuD
2021-03-22Fix inconsistencies in progress reporting (#2129)mageven
2021-03-03Add progress reporting to PTC and Shader Cache (#2057)mageven
2021-02-23PPTC: Fix unwanted propagation of a relocatable constant in a specific case. ...LDj3SNuD
2021-02-22Implement VCNT instruction (#1963)mageven
2021-02-22PPTC & Pool Enhancements. (#1968)LDj3SNuD
2021-02-21Turn Copy into Fill in HybridAllocator (#2010)FICTURE7
2021-02-17Fix memory tracking performance regression (#2026)gdkchan
2021-02-16Validate CPU virtual addresses on access (#1987)gdkchan
2021-02-08Optimization | Modify Add (Integer) Instruction to use LEA instead. (#1971)sharmander
2021-02-08Disable partial JIT invalidation on unmap (#1991)gdkchan
2021-01-28Lower precision of estimate instruction results to match Arm behavior (#1943)gdkchan
2021-01-26Implement PRFM (register variant) as NOP (#1956)mageven
2021-01-25Add VCLZ.* fast path (#1917)FICTURE7
2021-01-20CPU (A64): Add Fmaxnmp & Fminnmp Scalar Inst.s, Fast & Slow Paths; with Tests...LDj3SNuD
2021-01-12Add a simple Pools Limiter. (#1830)LDj3SNuD
2021-01-04CPU (A64): Add Pmull_V Inst. with Clmul fast path for the "1/2D -> 1Q" varian...LDj3SNuD
2020-12-24Hotfix for #1814Ac_K
2020-12-24Free up memory allocated by Pools during any PPTC translations at boot time. ...LDj3SNuD
2020-12-17Fix Vnmls_S fast path (F64: losing input d value). Fix Vnmla_S & Vnmls_S slow...LDj3SNuD
2020-12-17PPTC Follow-up. (#1712)LDj3SNuD
2020-12-16CPU: Implement VRINTX.F32 | VRINTX.F64 (#1776)sharmander
2020-12-16Clear JIT cache on exit (#1518)gdkchan
2020-12-15CPU: Implement VFMA (Vector) (#1762)sharmander
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