Ryujinx - A backup of the Ryujinx master git branch.

Age	Commit message (Expand)	Author
2023-01-12	Arm64: Cpu feature detection (#4264)	merry
2023-01-10	Implement JIT Arm64 backend (#4114)	gdkchan
2022-10-19	A64: Add fast path for Fcvtas_Gp/S/V, Fcvtau_Gp/S/V and Frinta_S/V in… (#3712)	LDj3SNuD
2022-09-20	Fpsr and Fpcr freed. (#3701)	LDj3SNuD
2022-01-29	Fix small precision error on CPU reciprocal estimate instructions (#3061)	gdkchan
2021-08-17	Reduce JIT GC allocations (#2515)	FICTURE7
2021-05-24	Improve accuracy of reciprocal step instructions (#2305)	gdkchan
2021-03-25	Add Sqdmulh_Ve & Sqrdmulh_Ve Inst.s with Tests. (#2139)	LDj3SNuD
2021-02-22	Implement VCNT instruction (#1963)	mageven
2021-01-28	Lower precision of estimate instruction results to match Arm behavior (#1943)	gdkchan
2021-01-25	Add VCLZ.* fast path (#1917)	FICTURE7
2021-01-20	CPU (A64): Add Fmaxnmp & Fminnmp Scalar Inst.s, Fast & Slow Paths; with Tests...	LDj3SNuD
2021-01-04	CPU (A64): Add Pmull_V Inst. with Clmul fast path for the "1/2D -> 1Q" varian...	LDj3SNuD
2020-12-07	Add support for guest Fz (Fpcr) mode through host Ftz and Daz (Mxcsr) modes (...	LDj3SNuD
2020-07-13	Add Fmax/minv_V & S/Ushl_S Inst.s with Tests. Fix Maxps/d & Minps/d d… (#1335)	LDj3SNuD
2020-06-16	Add Profiled Persistent Translation Cache. (#769)	LDj3SNuD
2020-05-27	Add FMaxNmV & FMinNmV Inst.s with Test. (#1279)	LDj3SNuD
2020-03-05	Implement Fast Paths for most A32 SIMD instructions (#952)	jduncanator
2019-12-29	Implemented fast paths for: (#846)	LDj3SNuD
2019-12-07	Implemented fast paths for: (#841)	LDj3SNuD
2019-10-31	.NET Core 3.0 is here! (#784)	LDj3SNuD
2019-08-08	Add a new JIT compiler for CPU code (#693)	gdkchan