diff options
Diffstat (limited to 'ChocolArm64')
| -rw-r--r-- | ChocolArm64/AOpCodeTable.cs | 3 | ||||
| -rw-r--r-- | ChocolArm64/Instruction/AInstEmitAlu.cs | 22 | ||||
| -rw-r--r-- | ChocolArm64/Instruction/AInstEmitSimdArithmetic.cs | 37 | ||||
| -rw-r--r-- | ChocolArm64/Instruction/AInstEmitSimdLogical.cs | 11 | ||||
| -rw-r--r-- | ChocolArm64/Instruction/ASoftFallback.cs | 10 |
5 files changed, 58 insertions, 25 deletions
diff --git a/ChocolArm64/AOpCodeTable.cs b/ChocolArm64/AOpCodeTable.cs index 4dc15754..71a179d1 100644 --- a/ChocolArm64/AOpCodeTable.cs +++ b/ChocolArm64/AOpCodeTable.cs @@ -148,6 +148,8 @@ namespace ChocolArm64 Set("0x101110111xxxxx000111xxxxxxxxxx", AInstEmit.Bif_V, typeof(AOpCodeSimdReg)); Set("0x101110101xxxxx000111xxxxxxxxxx", AInstEmit.Bit_V, typeof(AOpCodeSimdReg)); Set("0x101110011xxxxx000111xxxxxxxxxx", AInstEmit.Bsl_V, typeof(AOpCodeSimdReg)); + Set("0x001110<<100000010010xxxxxxxxxx", AInstEmit.Cls_V, typeof(AOpCodeSimd)); + Set("0x101110<<100000010010xxxxxxxxxx", AInstEmit.Clz_V, typeof(AOpCodeSimd)); Set("0>101110<<1xxxxx100011xxxxxxxxxx", AInstEmit.Cmeq_V, typeof(AOpCodeSimdReg)); Set("0>001110<<100000100110xxxxxxxxxx", AInstEmit.Cmeq_V, typeof(AOpCodeSimd)); Set("0>001110<<1xxxxx001111xxxxxxxxxx", AInstEmit.Cmge_V, typeof(AOpCodeSimdReg)); @@ -289,6 +291,7 @@ namespace ChocolArm64 Set("0111111011100000101110xxxxxxxxxx", AInstEmit.Neg_S, typeof(AOpCodeSimd)); Set("0>101110<<100000101110xxxxxxxxxx", AInstEmit.Neg_V, typeof(AOpCodeSimd)); Set("0x10111000100000010110xxxxxxxxxx", AInstEmit.Not_V, typeof(AOpCodeSimd)); + Set("0x001110111xxxxx000111xxxxxxxxxx", AInstEmit.Orn_V, typeof(AOpCodeSimdReg)); Set("0x001110101xxxxx000111xxxxxxxxxx", AInstEmit.Orr_V, typeof(AOpCodeSimdReg)); Set("0x00111100000xxx<<x101xxxxxxxxxx", AInstEmit.Orr_Vi, typeof(AOpCodeSimdImm)); Set("0x101110<<1xxxxx010000xxxxxxxxxx", AInstEmit.Raddhn_V, typeof(AOpCodeSimdReg)); diff --git a/ChocolArm64/Instruction/AInstEmitAlu.cs b/ChocolArm64/Instruction/AInstEmitAlu.cs index bacbfc9e..4fba5094 100644 --- a/ChocolArm64/Instruction/AInstEmitAlu.cs +++ b/ChocolArm64/Instruction/AInstEmitAlu.cs @@ -106,14 +106,9 @@ namespace ChocolArm64.Instruction Context.EmitLdintzr(Op.Rn); - if (Op.RegisterSize == ARegisterSize.Int32) - { - ASoftFallback.EmitCall(Context, nameof(ASoftFallback.CountLeadingSigns32)); - } - else - { - ASoftFallback.EmitCall(Context, nameof(ASoftFallback.CountLeadingSigns64)); - } + Context.EmitLdc_I4(Op.RegisterSize == ARegisterSize.Int32 ? 32 : 64); + + ASoftFallback.EmitCall(Context, nameof(ASoftFallback.CountLeadingSigns)); Context.EmitStintzr(Op.Rd); } @@ -124,14 +119,9 @@ namespace ChocolArm64.Instruction Context.EmitLdintzr(Op.Rn); - if (Op.RegisterSize == ARegisterSize.Int32) - { - ASoftFallback.EmitCall(Context, nameof(ASoftFallback.CountLeadingZeros32)); - } - else - { - ASoftFallback.EmitCall(Context, nameof(ASoftFallback.CountLeadingZeros64)); - } + Context.EmitLdc_I4(Op.RegisterSize == ARegisterSize.Int32 ? 32 : 64); + + ASoftFallback.EmitCall(Context, nameof(ASoftFallback.CountLeadingZeros)); Context.EmitStintzr(Op.Rd); } diff --git a/ChocolArm64/Instruction/AInstEmitSimdArithmetic.cs b/ChocolArm64/Instruction/AInstEmitSimdArithmetic.cs index 2dce7410..f4dcf864 100644 --- a/ChocolArm64/Instruction/AInstEmitSimdArithmetic.cs +++ b/ChocolArm64/Instruction/AInstEmitSimdArithmetic.cs @@ -109,6 +109,43 @@ namespace ChocolArm64.Instruction EmitScalarSet(Context, Op.Rd, Op.Size); } + public static void Cls_V(AILEmitterCtx Context) + { + MethodInfo MthdInfo = typeof(ASoftFallback).GetMethod(nameof(ASoftFallback.CountLeadingSigns)); + + EmitCountLeadingBits(Context, () => Context.EmitCall(MthdInfo)); + } + + public static void Clz_V(AILEmitterCtx Context) + { + MethodInfo MthdInfo = typeof(ASoftFallback).GetMethod(nameof(ASoftFallback.CountLeadingZeros)); + + EmitCountLeadingBits(Context, () => Context.EmitCall(MthdInfo)); + } + + private static void EmitCountLeadingBits(AILEmitterCtx Context, Action Emit) + { + AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp; + + int Bytes = Context.CurrOp.GetBitsCount() >> 3; + + for (int Index = 0; Index < (Bytes >> Op.Size); Index++) + { + EmitVectorExtractZx(Context, Op.Rn, Index, Op.Size); + + Context.EmitLdc_I4(8 << Op.Size); + + Emit(); + + EmitVectorInsert(Context, Op.Rd, Index, Op.Size); + } + + if (Op.RegisterSize == ARegisterSize.SIMD64) + { + EmitVectorZeroUpper(Context, Op.Rd); + } + } + public static void Cnt_V(AILEmitterCtx Context) { AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp; diff --git a/ChocolArm64/Instruction/AInstEmitSimdLogical.cs b/ChocolArm64/Instruction/AInstEmitSimdLogical.cs index 967c3d30..25aa873b 100644 --- a/ChocolArm64/Instruction/AInstEmitSimdLogical.cs +++ b/ChocolArm64/Instruction/AInstEmitSimdLogical.cs @@ -103,6 +103,15 @@ namespace ChocolArm64.Instruction EmitVectorUnaryOpZx(Context, () => Context.Emit(OpCodes.Not)); } + public static void Orn_V(AILEmitterCtx Context) + { + EmitVectorBinaryOpZx(Context, () => + { + Context.Emit(OpCodes.Not); + Context.Emit(OpCodes.Or); + }); + } + public static void Orr_V(AILEmitterCtx Context) { EmitVectorBinaryOpZx(Context, () => Context.Emit(OpCodes.Or)); @@ -136,4 +145,4 @@ namespace ChocolArm64.Instruction } } } -}
\ No newline at end of file +} diff --git a/ChocolArm64/Instruction/ASoftFallback.cs b/ChocolArm64/Instruction/ASoftFallback.cs index c08f253e..497605a4 100644 --- a/ChocolArm64/Instruction/ASoftFallback.cs +++ b/ChocolArm64/Instruction/ASoftFallback.cs @@ -20,18 +20,12 @@ namespace ChocolArm64.Instruction Context.EmitCall(typeof(ASoftFallback), MthdName); } - public static uint CountLeadingSigns32(uint Value) => (uint)CountLeadingSigns(Value, 32); - public static ulong CountLeadingSigns64(ulong Value) => (ulong)CountLeadingSigns(Value, 64); - - private static ulong CountLeadingSigns(ulong Value, int Size) + public static ulong CountLeadingSigns(ulong Value, int Size) { return CountLeadingZeros((Value >> 1) ^ Value, Size - 1); } - public static uint CountLeadingZeros32(uint Value) => (uint)CountLeadingZeros(Value, 32); - public static ulong CountLeadingZeros64(ulong Value) => (ulong)CountLeadingZeros(Value, 64); - - private static ulong CountLeadingZeros(ulong Value, int Size) + public static ulong CountLeadingZeros(ulong Value, int Size) { int HighBit = Size - 1; |