diff options
| author | LDj3SNuD <35856442+LDj3SNuD@users.noreply.github.com> | 2019-03-13 09:23:52 +0100 |
|---|---|---|
| committer | jduncanator <1518948+jduncanator@users.noreply.github.com> | 2019-03-13 19:23:52 +1100 |
| commit | 1bef70c068f8aeb6a3a518b8ca635de19122da14 (patch) | |
| tree | 84d3ead95523f4803de1e6288f38ad45d6039005 /Ryujinx.Tests/Cpu/CpuTestSimdIns.cs | |
| parent | a0aecd1ff85437890bb6a86fcc71fc90e80a4d24 (diff) | |
Add Rshrn_V & Shrn_V Sse opt.. Add Mla_V, Mls_V & Mul_V Sse opt.; add Tests. (#614)
* Update CountLeadingZeros().
* Remove obsolete Tests.
* Follow-up.
* Follow-up.
* Follow-up.
* Add Mla_V, Mls_V & Mul_V Tests.
* Update PackageReferences.
* Remove EmitLd/Stvectmp2().
* Remove Dup. Nits.
* Remove EmitLd/Stvectmp2() & Dup; nits.
* Remove Tmp stuff & Dup; rework Fcvtz() as Fcvtn().
* Remove Tmp stuff, EmitLd/Stvectmp2() & Dup. Nits.
* Add (R)shrn_V Sse opt.; add "Part" & "Shift" opt..
Remove Tmp stuff; remove Dup.
Nits.
* Add Mla/Mls/Mul_V Sse opt.. Add "Part" opt..
Remove EmitLd/Stvectmp2(), remove Dup.
Nits.
* Nits.
* Nits.
* Nit.
* Add "Part" opt.. Nit.
* Nit.
* Nit.
* Add Cmhi_V & Cmhs_V Sse opt..
Diffstat (limited to 'Ryujinx.Tests/Cpu/CpuTestSimdIns.cs')
| -rw-r--r-- | Ryujinx.Tests/Cpu/CpuTestSimdIns.cs | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/Ryujinx.Tests/Cpu/CpuTestSimdIns.cs b/Ryujinx.Tests/Cpu/CpuTestSimdIns.cs index 4ca54a2b..fe93f06e 100644 --- a/Ryujinx.Tests/Cpu/CpuTestSimdIns.cs +++ b/Ryujinx.Tests/Cpu/CpuTestSimdIns.cs @@ -67,7 +67,8 @@ namespace Ryujinx.Tests.Cpu } #endregion - private const int RndCnt = 2; + private const int RndCnt = 2; + private const int RndCntIndex = 2; [Test, Pairwise, Description("DUP <Vd>.<T>, <R><n>")] public void Dup_Gp_W([Values(0u)] uint rd, @@ -109,7 +110,7 @@ namespace Ryujinx.Tests.Cpu [Test, Pairwise, Description("DUP B0, V1.B[<index>]")] public void Dup_S_B([ValueSource("_8B_")] [Random(RndCnt)] ulong a, - [Range(0u, 15u)] uint index) + [Values(0u, 15u)] [Random(1u, 14u, RndCntIndex)] uint index) { const int size = 0; @@ -129,7 +130,7 @@ namespace Ryujinx.Tests.Cpu [Test, Pairwise, Description("DUP H0, V1.H[<index>]")] public void Dup_S_H([ValueSource("_4H_")] [Random(RndCnt)] ulong a, - [Range(0u, 7u)] uint index) + [Values(0u, 7u)] [Random(1u, 6u, RndCntIndex)] uint index) { const int size = 1; @@ -192,7 +193,7 @@ namespace Ryujinx.Tests.Cpu [Values(1u, 0u)] uint rn, [ValueSource("_8B_")] [Random(RndCnt)] ulong z, [ValueSource("_8B_")] [Random(RndCnt)] ulong a, - [Range(0u, 15u)] uint index, + [Values(0u, 15u)] [Random(1u, 14u, RndCntIndex)] uint index, [Values(0b0u, 0b1u)] uint q) // <8B, 16B> { const int size = 0; @@ -217,7 +218,7 @@ namespace Ryujinx.Tests.Cpu [Values(1u, 0u)] uint rn, [ValueSource("_4H_")] [Random(RndCnt)] ulong z, [ValueSource("_4H_")] [Random(RndCnt)] ulong a, - [Range(0u, 7u)] uint index, + [Values(0u, 7u)] [Random(1u, 6u, RndCntIndex)] uint index, [Values(0b0u, 0b1u)] uint q) // <4H, 8H> { const int size = 1; |