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authorgdkchan <gab.dark.100@gmail.com>2020-02-29 17:51:55 -0300
committerGitHub <noreply@github.com>2020-03-01 07:51:55 +1100
commitfb0939f9b68d7fb83d863b22ef99af93452bb4bf (patch)
tree1be02b3674c8b94fee0cb12503bd00060810ccb5 /Ryujinx.Tests/Cpu/CpuTestMul32.cs
parentb8ee5b15abc750e0484195633e6c4bb6e05eab6f (diff)
Add SSAT, SSAT16, USAT and USAT16 ARM32 instructions (#954)
* Implement SMULWB, SMULWT, SMLAWB, SMLAWT, and add tests for some multiply instructions * Improve test descriptions * Rename SMULH to SMUL__ * Add SSAT, SSAT16, USAT and USAT16 ARM32 instructions * Fix new tests * Replace AND 0xFFFF with 16-bits zero extension (more efficient)
Diffstat (limited to 'Ryujinx.Tests/Cpu/CpuTestMul32.cs')
-rw-r--r--Ryujinx.Tests/Cpu/CpuTestMul32.cs140
1 files changed, 140 insertions, 0 deletions
diff --git a/Ryujinx.Tests/Cpu/CpuTestMul32.cs b/Ryujinx.Tests/Cpu/CpuTestMul32.cs
new file mode 100644
index 00000000..4bdb2ae2
--- /dev/null
+++ b/Ryujinx.Tests/Cpu/CpuTestMul32.cs
@@ -0,0 +1,140 @@
+#define Mul32
+
+using NUnit.Framework;
+using System;
+
+namespace Ryujinx.Tests.Cpu
+{
+ [Category("Mul32")]
+ public sealed class CpuTestMul32 : CpuTest32
+ {
+#if Mul32
+
+#region "ValueSource (Opcodes)"
+ private static uint[] _Smlabb_Smlabt_Smlatb_Smlatt_()
+ {
+ return new uint[]
+ {
+ 0xe1000080u, // SMLABB R0, R0, R0, R0
+ 0xe10000C0u, // SMLABT R0, R0, R0, R0
+ 0xe10000A0u, // SMLATB R0, R0, R0, R0
+ 0xe10000E0u, // SMLATT R0, R0, R0, R0
+ };
+ }
+
+ private static uint[] _Smlawb_Smlawt_()
+ {
+ return new uint[]
+ {
+ 0xe1200080u, // SMLAWB R0, R0, R0, R0
+ 0xe12000C0u, // SMLAWT R0, R0, R0, R0
+ };
+ }
+
+ private static uint[] _Smulbb_Smulbt_Smultb_Smultt_()
+ {
+ return new uint[]
+ {
+ 0xe1600080u, // SMULBB R0, R0, R0
+ 0xe16000C0u, // SMULBT R0, R0, R0
+ 0xe16000A0u, // SMULTB R0, R0, R0
+ 0xe16000E0u, // SMULTT R0, R0, R0
+ };
+ }
+
+ private static uint[] _Smulwb_Smulwt_()
+ {
+ return new uint[]
+ {
+ 0xe12000a0u, // SMULWB R0, R0, R0
+ 0xe12000e0u, // SMULWT R0, R0, R0
+ };
+ }
+#endregion
+
+ private const int RndCnt = 2;
+
+ [Test, Pairwise, Description("SMLA<x><y> <Rd>, <Rn>, <Rm>, <Ra>")]
+ public void Smla___32bit([ValueSource("_Smlabb_Smlabt_Smlatb_Smlatt_")] uint opcode,
+ [Values(0u, 0xdu)] uint rn,
+ [Values(1u, 0xdu)] uint rm,
+ [Values(2u, 0xdu)] uint ra,
+ [Values(3u, 0xdu)] uint rd,
+ [Values(0x00000000u, 0x7FFFFFFFu,
+ 0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn,
+ [Values(0x00000000u, 0x7FFFFFFFu,
+ 0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wm,
+ [Values(0x00000000u, 0x7FFFFFFFu,
+ 0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wa)
+ {
+ opcode |= ((rn & 15) << 0) | ((rm & 15) << 8) | ((ra & 15) << 12) | ((rd & 15) << 16);
+
+ uint w31 = TestContext.CurrentContext.Random.NextUInt();
+
+ SingleOpcode(opcode, r0: wn, r1: wm, r2: wa, sp: w31);
+
+ CompareAgainstUnicorn();
+ }
+
+ [Test, Pairwise, Description("SMLAW<x> <Rd>, <Rn>, <Rm>, <Ra>")]
+ public void Smlaw__32bit([ValueSource("_Smlawb_Smlawt_")] uint opcode,
+ [Values(0u, 0xdu)] uint rn,
+ [Values(1u, 0xdu)] uint rm,
+ [Values(2u, 0xdu)] uint ra,
+ [Values(3u, 0xdu)] uint rd,
+ [Values(0x00000000u, 0x7FFFFFFFu,
+ 0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn,
+ [Values(0x00000000u, 0x7FFFFFFFu,
+ 0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wm,
+ [Values(0x00000000u, 0x7FFFFFFFu,
+ 0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wa)
+ {
+ opcode |= ((rn & 15) << 0) | ((rm & 15) << 8) | ((ra & 15) << 12) | ((rd & 15) << 16);
+
+ uint w31 = TestContext.CurrentContext.Random.NextUInt();
+
+ SingleOpcode(opcode, r0: wn, r1: wm, r2: wa, sp: w31);
+
+ CompareAgainstUnicorn();
+ }
+
+ [Test, Pairwise, Description("SMUL<x><y> <Rd>, <Rn>, <Rm>")]
+ public void Smul___32bit([ValueSource("_Smulbb_Smulbt_Smultb_Smultt_")] uint opcode,
+ [Values(0u, 0xdu)] uint rn,
+ [Values(1u, 0xdu)] uint rm,
+ [Values(2u, 0xdu)] uint rd,
+ [Values(0x00000000u, 0x7FFFFFFFu,
+ 0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn,
+ [Values(0x00000000u, 0x7FFFFFFFu,
+ 0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wm)
+ {
+ opcode |= ((rn & 15) << 0) | ((rm & 15) << 8) | ((rd & 15) << 16);
+
+ uint w31 = TestContext.CurrentContext.Random.NextUInt();
+
+ SingleOpcode(opcode, r0: wn, r1: wm, sp: w31);
+
+ CompareAgainstUnicorn();
+ }
+
+ [Test, Pairwise, Description("SMULW<x> <Rd>, <Rn>, <Rm>")]
+ public void Smulw__32bit([ValueSource("_Smulwb_Smulwt_")] uint opcode,
+ [Values(0u, 0xdu)] uint rn,
+ [Values(1u, 0xdu)] uint rm,
+ [Values(2u, 0xdu)] uint rd,
+ [Values(0x00000000u, 0x7FFFFFFFu,
+ 0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn,
+ [Values(0x00000000u, 0x7FFFFFFFu,
+ 0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wm)
+ {
+ opcode |= ((rn & 15) << 0) | ((rm & 15) << 8) | ((rd & 15) << 16);
+
+ uint w31 = TestContext.CurrentContext.Random.NextUInt();
+
+ SingleOpcode(opcode, r0: wn, r1: wm, sp: w31);
+
+ CompareAgainstUnicorn();
+ }
+#endif
+ }
+}