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authorgdkchan <gab.dark.100@gmail.com>2021-10-28 19:53:12 -0300
committerGitHub <noreply@github.com>2021-10-28 19:53:12 -0300
commit99445dd0a63f4a6fcb53e7818cda689d8299453b (patch)
tree9d979f95e3e4cdf12999bc005655505953a60613 /Ryujinx.Graphics.Shader/CodeGen/Glsl/Instructions/InstGenFSI.cs
parenta7a40a77f2c07ea0ea9f6e7bfb57dbe9fce06db7 (diff)
Add support for fragment shader interlock (#2768)
* Support coherent images * Add support for fragment shader interlock * Change to tree based match approach * Refactor + check for branch targets and external registers * Make detection more robust * Use Intel fragment shader ordering if interlock is not available, use nothing if both are not available * Remove unused field
Diffstat (limited to 'Ryujinx.Graphics.Shader/CodeGen/Glsl/Instructions/InstGenFSI.cs')
-rw-r--r--Ryujinx.Graphics.Shader/CodeGen/Glsl/Instructions/InstGenFSI.cs29
1 files changed, 29 insertions, 0 deletions
diff --git a/Ryujinx.Graphics.Shader/CodeGen/Glsl/Instructions/InstGenFSI.cs b/Ryujinx.Graphics.Shader/CodeGen/Glsl/Instructions/InstGenFSI.cs
new file mode 100644
index 00000000..f61a53cb
--- /dev/null
+++ b/Ryujinx.Graphics.Shader/CodeGen/Glsl/Instructions/InstGenFSI.cs
@@ -0,0 +1,29 @@
+namespace Ryujinx.Graphics.Shader.CodeGen.Glsl.Instructions
+{
+ static class InstGenFSI
+ {
+ public static string FSIBegin(CodeGenContext context)
+ {
+ if (context.Config.GpuAccessor.QueryHostSupportsFragmentShaderInterlock())
+ {
+ return "beginInvocationInterlockARB()";
+ }
+ else if (context.Config.GpuAccessor.QueryHostSupportsFragmentShaderOrderingIntel())
+ {
+ return "beginFragmentShaderOrderingINTEL()";
+ }
+
+ return null;
+ }
+
+ public static string FSIEnd(CodeGenContext context)
+ {
+ if (context.Config.GpuAccessor.QueryHostSupportsFragmentShaderInterlock())
+ {
+ return "endInvocationInterlockARB()";
+ }
+
+ return null;
+ }
+ }
+} \ No newline at end of file