diff options
| author | Rygnus <firewolfgames.ryanteal@gmail.com> | 2018-06-25 18:23:46 +0100 |
|---|---|---|
| committer | gdkchan <gab.dark.100@gmail.com> | 2018-06-25 14:23:46 -0300 |
| commit | 0bec9d8439de99de3959c170e33b2b93d030b837 (patch) | |
| tree | d1a76884e6ea685c2d69969be24e76233ddae134 /ChocolArm64 | |
| parent | 7c7ee8f8ca0dddcc7c16c16d8a14527e4557fd82 (diff) | |
Add opcodes SQXTUN_S and SQXTUN_V (#184)
* Add SQXTUN_S and SQXTUN_V
Part 1/2 of commit
* Add SQXTUN_S and SQXTUN_V (2/2)
Part 2/2 of commit
Diffstat (limited to 'ChocolArm64')
| -rw-r--r-- | ChocolArm64/AOpCodeTable.cs | 4 | ||||
| -rw-r--r-- | ChocolArm64/Instruction/AInstEmitSimdArithmetic.cs | 10 |
2 files changed, 13 insertions, 1 deletions
diff --git a/ChocolArm64/AOpCodeTable.cs b/ChocolArm64/AOpCodeTable.cs index 853c06a6..c0c38bb3 100644 --- a/ChocolArm64/AOpCodeTable.cs +++ b/ChocolArm64/AOpCodeTable.cs @@ -364,6 +364,8 @@ namespace ChocolArm64 SetA64("0x001110<<1xxxxx110000xxxxxxxxxx", AInstEmit.Smull_V, typeof(AOpCodeSimdReg)); SetA64("01011110<<100001010010xxxxxxxxxx", AInstEmit.Sqxtn_S, typeof(AOpCodeSimd)); SetA64("0x001110<<100001010010xxxxxxxxxx", AInstEmit.Sqxtn_V, typeof(AOpCodeSimd)); + SetA64("01111110<<100001001010xxxxxxxxxx", AInstEmit.Sqxtun_S, typeof(AOpCodeSimd)); + SetA64("0x101110<<100001001010xxxxxxxxxx", AInstEmit.Sqxtun_V, typeof(AOpCodeSimd)); SetA64("0>001110<<1xxxxx010001xxxxxxxxxx", AInstEmit.Sshl_V, typeof(AOpCodeSimdReg)); SetA64("0x00111100>>>xxx101001xxxxxxxxxx", AInstEmit.Sshll_V, typeof(AOpCodeSimdShImm)); SetA64("010111110>>>>xxx000001xxxxxxxxxx", AInstEmit.Sshr_S, typeof(AOpCodeSimdShImm)); @@ -560,4 +562,4 @@ namespace ChocolArm64 return AInst.Undefined; } } -}
\ No newline at end of file +} diff --git a/ChocolArm64/Instruction/AInstEmitSimdArithmetic.cs b/ChocolArm64/Instruction/AInstEmitSimdArithmetic.cs index 49a5c506..8cd4654b 100644 --- a/ChocolArm64/Instruction/AInstEmitSimdArithmetic.cs +++ b/ChocolArm64/Instruction/AInstEmitSimdArithmetic.cs @@ -1145,6 +1145,16 @@ namespace ChocolArm64.Instruction EmitQxtn(Context, Signed: true, Scalar: false); } + public static void Sqxtun_S(AILEmitterCtx Context) + { + EmitQxtn(Context, Signed: false, Scalar: true); + } + + public static void Sqxtun_V(AILEmitterCtx Context) + { + EmitQxtn(Context, Signed: false, Scalar: false); + } + public static void Sub_S(AILEmitterCtx Context) { EmitScalarBinaryOpZx(Context, () => Context.Emit(OpCodes.Sub)); |