diff options
| author | riperiperi <rhy3756547@hotmail.com> | 2020-07-13 11:48:14 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-07-13 20:48:14 +1000 |
| commit | d7044b10a253dae31b9a0041a432e3a7adce59f6 (patch) | |
| tree | 20947496224af14c43803de8169a6493aa77b45b /ARMeilleure/IntermediateRepresentation | |
| parent | 30d4f752f47217bcdc4dd05428010acf270189d0 (diff) | |
Add SSE4.2 Path for CRC32, add A32 variant, add tests for non-castagnoli variants. (#1328)
* Add CRC32 A32 instructions.
* Fix CRC32 instructions.
* Add CRC intrinsic and fast path.
Loop is currently unrolled, will look into adding temp vars after tests are added.
* Begin work on Crc tests
* Fix SSE4.2 path for CRC32C, finialize tests.
* Remove unused IR path.
* Fix spacing between prefix checks.
* This should be Src.
* PTC Version
* OpCodeTable Order
* Integer check improvement. Value and Crc can be either 32 or 64 size.
* This wasn't necessary...
* If size is 3, value type must be I64.
* Fix same src+dest handling for non crc intrinsics.
* Pre-fix (ha) issue with vex encodings
Diffstat (limited to 'ARMeilleure/IntermediateRepresentation')
| -rw-r--r-- | ARMeilleure/IntermediateRepresentation/Intrinsic.cs | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/ARMeilleure/IntermediateRepresentation/Intrinsic.cs b/ARMeilleure/IntermediateRepresentation/Intrinsic.cs index 639ba7f9..7f891170 100644 --- a/ARMeilleure/IntermediateRepresentation/Intrinsic.cs +++ b/ARMeilleure/IntermediateRepresentation/Intrinsic.cs @@ -27,6 +27,9 @@ namespace ARMeilleure.IntermediateRepresentation X86Comisseq, X86Comissge, X86Comisslt, + X86Crc32, + X86Crc32_16, + X86Crc32_8, X86Cvtdq2pd, X86Cvtdq2ps, X86Cvtpd2dq, |