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| author | gdkchan <gab.dark.100@gmail.com> | 2020-03-10 02:17:30 -0300 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-03-10 16:17:30 +1100 |
| commit | 89ccec197ec9a5db2bb308ef3e9178910d1ab7a8 (patch) | |
| tree | 3f487a86d3495feefd904d4cd7195d9c798c008b /ARMeilleure/Decoders/OpCode32SimdImm.cs | |
| parent | 08c0e3829bc96932d386de18647bde2768fe26ed (diff) | |
Implement VMOVL and VORR.I32 AArch32 SIMD instructions (#960)
* Implement VMOVL and VORR.I32 AArch32 SIMD instructions
* Rename <dt> to <size> on test description
* Rename Widen to Long and improve VMOVL implementation a bit
Diffstat (limited to 'ARMeilleure/Decoders/OpCode32SimdImm.cs')
| -rw-r--r-- | ARMeilleure/Decoders/OpCode32SimdImm.cs | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/ARMeilleure/Decoders/OpCode32SimdImm.cs b/ARMeilleure/Decoders/OpCode32SimdImm.cs index 72fca59c..c6ae7ec5 100644 --- a/ARMeilleure/Decoders/OpCode32SimdImm.cs +++ b/ARMeilleure/Decoders/OpCode32SimdImm.cs @@ -1,11 +1,9 @@ namespace ARMeilleure.Decoders { - class OpCode32SimdImm : OpCode32, IOpCode32SimdImm + class OpCode32SimdImm : OpCode32SimdBase, IOpCode32SimdImm { - public int Vd { get; private set; } public bool Q { get; private set; } public long Immediate { get; private set; } - public int Size { get; private set; } public int Elems => GetBytesCount() >> Size; public OpCode32SimdImm(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode) @@ -24,7 +22,7 @@ imm |= ((uint)opCode >> 12) & 0x70; imm |= ((uint)opCode >> 17) & 0x80; - (Immediate, Size) = OpCodeSimdHelper.GetSimdImmediateAndSize(cMode, op, imm, fpBaseSize: 2); + (Immediate, Size) = OpCodeSimdHelper.GetSimdImmediateAndSize(cMode, op, imm); RegisterSize = Q ? RegisterSize.Simd128 : RegisterSize.Simd64; |