From 89ccec197ec9a5db2bb308ef3e9178910d1ab7a8 Mon Sep 17 00:00:00 2001 From: gdkchan Date: Tue, 10 Mar 2020 02:17:30 -0300 Subject: Implement VMOVL and VORR.I32 AArch32 SIMD instructions (#960) * Implement VMOVL and VORR.I32 AArch32 SIMD instructions * Rename
to on test description * Rename Widen to Long and improve VMOVL implementation a bit --- ARMeilleure/Decoders/OpCode32SimdImm.cs | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'ARMeilleure/Decoders/OpCode32SimdImm.cs') diff --git a/ARMeilleure/Decoders/OpCode32SimdImm.cs b/ARMeilleure/Decoders/OpCode32SimdImm.cs index 72fca59c..c6ae7ec5 100644 --- a/ARMeilleure/Decoders/OpCode32SimdImm.cs +++ b/ARMeilleure/Decoders/OpCode32SimdImm.cs @@ -1,11 +1,9 @@ namespace ARMeilleure.Decoders { - class OpCode32SimdImm : OpCode32, IOpCode32SimdImm + class OpCode32SimdImm : OpCode32SimdBase, IOpCode32SimdImm { - public int Vd { get; private set; } public bool Q { get; private set; } public long Immediate { get; private set; } - public int Size { get; private set; } public int Elems => GetBytesCount() >> Size; public OpCode32SimdImm(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode) @@ -24,7 +22,7 @@ imm |= ((uint)opCode >> 12) & 0x70; imm |= ((uint)opCode >> 17) & 0x80; - (Immediate, Size) = OpCodeSimdHelper.GetSimdImmediateAndSize(cMode, op, imm, fpBaseSize: 2); + (Immediate, Size) = OpCodeSimdHelper.GetSimdImmediateAndSize(cMode, op, imm); RegisterSize = Q ? RegisterSize.Simd128 : RegisterSize.Simd64; -- cgit v1.2.3