diff options
| author | riperiperi <rhy3756547@hotmail.com> | 2020-03-18 11:44:32 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-03-18 22:44:32 +1100 |
| commit | 8226997bc7334ef2c29a1dadee72591f6d6037b1 (patch) | |
| tree | f95b9aa233bbbef2f5288fb29c4c89cf8738ef74 /ARMeilleure/CodeGen/X86 | |
| parent | 7475e180b4344fa2cf60243d8257304871fad24a (diff) | |
CodeGen Optimisations (LSRA and Translator) (#978)
* Start of JIT garbage collection improvements
- thread static pool for Operand, MemoryOperand, Operation
- Operands and Operations are always to be constructed via their static
helper classes, so they can be pooled.
- removing LinkedList from Node for sources/destinations (replaced with
List<>s for now, but probably could do arrays since size is bounded)
- removing params constructors from Node
- LinkedList<> to List<> with Clear() for Operand assignments/uses
- ThreadStaticPool is very simple and basically just exists for the
purpose of our specific translation allocation problem. Right now it
will stay at the worst case allocation count for that thread (so far) -
the pool can never shrink.
- Still some cases of Operand[] that haven't been removed yet. Will need
to evaluate them (eg. is there a reasonable max number of params for
Calls?)
* ConcurrentStack instead of ConcurrentQueue for Rejit
* Optimize some parts of LSRA
- BitMap now operates on 64-bit int rather than 32-bit
- BitMap is now pooled in a ThreadStatic pool (within lrsa)
- BitMap now is now its own iterator. Marginally speeds up iterating
through the bits.
- A few cases where enumerators were generated have been converted to
forms that generate less garbage.
- New data structure for sorting _usePositions in LiveIntervals. Much
faster split, NextUseAfter, initial insertion. Random insertion is
slightly slower.
- That last one is WIP since you need to insert the values backwards. It
would be ideal if it just flipped it for you, uncomplicating things on
the caller side.
* Use a static pool of thread static pools. (yes.)
Prevents each execution thread creating its own lowCq pool and making me cry.
* Move constant value to top, change naming convention.
* Fix iteration of memory operands.
* Increase max thread count.
* Address Feedback
Diffstat (limited to 'ARMeilleure/CodeGen/X86')
| -rw-r--r-- | ARMeilleure/CodeGen/X86/CodeGenerator.cs | 43 | ||||
| -rw-r--r-- | ARMeilleure/CodeGen/X86/PreAllocator.cs | 165 | ||||
| -rw-r--r-- | ARMeilleure/CodeGen/X86/X86Optimizer.cs | 7 |
3 files changed, 110 insertions, 105 deletions
diff --git a/ARMeilleure/CodeGen/X86/CodeGenerator.cs b/ARMeilleure/CodeGen/X86/CodeGenerator.cs index 1d0a4c12..1bcab736 100644 --- a/ARMeilleure/CodeGen/X86/CodeGenerator.cs +++ b/ARMeilleure/CodeGen/X86/CodeGenerator.cs @@ -9,6 +9,9 @@ using System; using System.Collections.Generic; using System.Diagnostics; using System.IO; +using System.Numerics; + +using static ARMeilleure.IntermediateRepresentation.OperandHelper; namespace ARMeilleure.CodeGen.X86 { @@ -550,7 +553,7 @@ namespace ARMeilleure.CodeGen.X86 if (operation.SourcesCount == 5) // CompareAndSwap128 has 5 sources, compared to CompareAndSwap64/32's 3. { - MemoryOperand memOp = new MemoryOperand(OperandType.I64, src1); + MemoryOperand memOp = MemoryOp(OperandType.I64, src1); context.Assembler.Cmpxchg16b(memOp); } @@ -561,7 +564,7 @@ namespace ARMeilleure.CodeGen.X86 EnsureSameType(src2, src3); - MemoryOperand memOp = new MemoryOperand(src3.Type, src1); + MemoryOperand memOp = MemoryOp(src3.Type, src1); context.Assembler.Cmpxchg(memOp, src3); } @@ -751,7 +754,7 @@ namespace ARMeilleure.CodeGen.X86 // operand size constant to the destination register. context.JumpToNear(X86Condition.NotEqual); - context.Assembler.Mov(dest, new Operand(operandSize | operandMask), OperandType.I32); + context.Assembler.Mov(dest, Const(operandSize | operandMask), OperandType.I32); context.JumpHere(); @@ -759,7 +762,7 @@ namespace ARMeilleure.CodeGen.X86 // starting from the least significant bit. However we are supposed to // return the number of 0 bits on the high end. So, we invert the result // of the BSR using XOR to get the correct value. - context.Assembler.Xor(dest, new Operand(operandMask), OperandType.I32); + context.Assembler.Xor(dest, Const(operandMask), OperandType.I32); } private static void GenerateCpuId(CodeGenContext context, Operation operation) @@ -828,7 +831,7 @@ namespace ARMeilleure.CodeGen.X86 Operand rsp = Register(X86Register.Rsp); - MemoryOperand memOp = new MemoryOperand(dest.Type, rsp, null, Multiplier.x1, offs); + MemoryOperand memOp = MemoryOp(dest.Type, rsp, null, Multiplier.x1, offs); GenerateLoad(context, memOp, dest); } @@ -1027,7 +1030,7 @@ namespace ARMeilleure.CodeGen.X86 Operand rsp = Register(X86Register.Rsp); - MemoryOperand memOp = new MemoryOperand(source.Type, rsp, null, Multiplier.x1, offs); + MemoryOperand memOp = MemoryOp(source.Type, rsp, null, Multiplier.x1, offs); GenerateStore(context, memOp, source); } @@ -1043,7 +1046,7 @@ namespace ARMeilleure.CodeGen.X86 Operand rsp = Register(X86Register.Rsp); - MemoryOperand memOp = new MemoryOperand(OperandType.I64, rsp, null, Multiplier.x1, offs); + MemoryOperand memOp = MemoryOp(OperandType.I64, rsp, null, Multiplier.x1, offs); context.Assembler.Lea(dest, memOp, OperandType.I64); } @@ -1247,7 +1250,7 @@ namespace ARMeilleure.CodeGen.X86 if ((index & 1) != 0) { - context.Assembler.Shr(dest, new Operand(8), OperandType.I32); + context.Assembler.Shr(dest, Const(8), OperandType.I32); } else { @@ -1286,7 +1289,7 @@ namespace ARMeilleure.CodeGen.X86 context.Assembler.Pinsrw(dest, dest, src2, (byte)(index * words + word)); // Move next word down. - context.Assembler.Ror(src2, new Operand(16), src2.Type); + context.Assembler.Ror(src2, Const(16), src2.Type); } } @@ -1594,7 +1597,7 @@ namespace ARMeilleure.CodeGen.X86 while (mask != 0) { - int bit = BitUtils.LowestBitSet(mask); + int bit = BitOperations.TrailingZeroCount(mask); context.Assembler.Push(Register((X86Register)bit)); @@ -1614,7 +1617,7 @@ namespace ARMeilleure.CodeGen.X86 if (reservedStackSize != 0) { - context.Assembler.Sub(rsp, new Operand(reservedStackSize), OperandType.I64); + context.Assembler.Sub(rsp, Const(reservedStackSize), OperandType.I64); } int offset = reservedStackSize; @@ -1623,11 +1626,11 @@ namespace ARMeilleure.CodeGen.X86 while (mask != 0) { - int bit = BitUtils.LowestBitSet(mask); + int bit = BitOperations.TrailingZeroCount(mask); offset -= 16; - MemoryOperand memOp = new MemoryOperand(OperandType.V128, rsp, null, Multiplier.x1, offset); + MemoryOperand memOp = MemoryOp(OperandType.V128, rsp, null, Multiplier.x1, offset); context.Assembler.Movdqu(memOp, Xmm((X86Register)bit)); @@ -1653,11 +1656,11 @@ namespace ARMeilleure.CodeGen.X86 while (mask != 0) { - int bit = BitUtils.LowestBitSet(mask); + int bit = BitOperations.TrailingZeroCount(mask); offset -= 16; - MemoryOperand memOp = new MemoryOperand(OperandType.V128, rsp, null, Multiplier.x1, offset); + MemoryOperand memOp = MemoryOp(OperandType.V128, rsp, null, Multiplier.x1, offset); context.Assembler.Movdqu(Xmm((X86Register)bit), memOp); @@ -1666,7 +1669,7 @@ namespace ARMeilleure.CodeGen.X86 if (reservedStackSize != 0) { - context.Assembler.Add(rsp, new Operand(reservedStackSize), OperandType.I64); + context.Assembler.Add(rsp, Const(reservedStackSize), OperandType.I64); } mask = CallingConvention.GetIntCalleeSavedRegisters() & context.AllocResult.IntUsedRegisters; @@ -1698,7 +1701,7 @@ namespace ARMeilleure.CodeGen.X86 for (int offset = PageSize; offset < size; offset += PageSize) { - Operand memOp = new MemoryOperand(OperandType.I32, rsp, null, Multiplier.x1, -offset); + Operand memOp = MemoryOp(OperandType.I32, rsp, null, Multiplier.x1, -offset); context.Assembler.Mov(temp, memOp, OperandType.I32); } @@ -1711,17 +1714,17 @@ namespace ARMeilleure.CodeGen.X86 return operand as MemoryOperand; } - return new MemoryOperand(type, operand); + return MemoryOp(type, operand); } private static Operand Register(X86Register register, OperandType type = OperandType.I64) { - return new Operand((int)register, RegisterType.Integer, type); + return OperandHelper.Register((int)register, RegisterType.Integer, type); } private static Operand Xmm(X86Register register) { - return new Operand((int)register, RegisterType.Vector, OperandType.V128); + return OperandHelper.Register((int)register, RegisterType.Vector, OperandType.V128); } } }
\ No newline at end of file diff --git a/ARMeilleure/CodeGen/X86/PreAllocator.cs b/ARMeilleure/CodeGen/X86/PreAllocator.cs index e20fca9d..7c119349 100644 --- a/ARMeilleure/CodeGen/X86/PreAllocator.cs +++ b/ARMeilleure/CodeGen/X86/PreAllocator.cs @@ -6,6 +6,7 @@ using System.Collections.Generic; using System.Diagnostics; using static ARMeilleure.IntermediateRepresentation.OperandHelper; +using static ARMeilleure.IntermediateRepresentation.OperationHelper; namespace ARMeilleure.CodeGen.X86 { @@ -223,8 +224,8 @@ namespace ARMeilleure.CodeGen.X86 // - The value at the memory location is loaded to RDX:RAX. void SplitOperand(Operand source, Operand lr, Operand hr) { - nodes.AddBefore(node, new Operation(Instruction.VectorExtract, lr, source, Const(0))); - nodes.AddBefore(node, new Operation(Instruction.VectorExtract, hr, source, Const(1))); + nodes.AddBefore(node, Operation(Instruction.VectorExtract, lr, source, Const(0))); + nodes.AddBefore(node, Operation(Instruction.VectorExtract, hr, source, Const(1))); } Operand rax = Gpr(X86Register.Rax, OperandType.I64); @@ -235,8 +236,8 @@ namespace ARMeilleure.CodeGen.X86 SplitOperand(operation.GetSource(1), rax, rdx); SplitOperand(operation.GetSource(2), rbx, rcx); - node = nodes.AddAfter(node, new Operation(Instruction.VectorCreateScalar, dest, rax)); - node = nodes.AddAfter(node, new Operation(Instruction.VectorInsert, dest, dest, rdx, Const(1))); + node = nodes.AddAfter(node, Operation(Instruction.VectorCreateScalar, dest, rax)); + node = nodes.AddAfter(node, Operation(Instruction.VectorInsert, dest, dest, rdx, Const(1))); operation.SetDestinations(new Operand[] { rdx, rax }); @@ -252,11 +253,11 @@ namespace ARMeilleure.CodeGen.X86 Operand rax = Gpr(X86Register.Rax, expected.Type); - nodes.AddBefore(node, new Operation(Instruction.Copy, rax, expected)); + nodes.AddBefore(node, Operation(Instruction.Copy, rax, expected)); operation.SetSources(new Operand[] { operation.GetSource(0), rax, operation.GetSource(2) }); - node = nodes.AddAfter(node, new Operation(Instruction.Copy, dest, rax)); + node = nodes.AddAfter(node, Operation(Instruction.Copy, dest, rax)); operation.Destination = rax; } @@ -278,16 +279,16 @@ namespace ARMeilleure.CodeGen.X86 Operand edx = Gpr(X86Register.Rdx, OperandType.I32); // Value 0x01 = Version, family and feature information. - nodes.AddBefore(node, new Operation(Instruction.Copy, eax, Const(1))); + nodes.AddBefore(node, Operation(Instruction.Copy, eax, Const(1))); // Copy results to the destination register. // The values are split into 2 32-bits registers, we merge them // into a single 64-bits register. Operand rcx = Gpr(X86Register.Rcx, OperandType.I64); - node = nodes.AddAfter(node, new Operation(Instruction.ZeroExtend32, dest, edx)); - node = nodes.AddAfter(node, new Operation(Instruction.ShiftLeft, dest, dest, Const(32))); - node = nodes.AddAfter(node, new Operation(Instruction.BitwiseOr, dest, dest, rcx)); + node = nodes.AddAfter(node, Operation(Instruction.ZeroExtend32, dest, edx)); + node = nodes.AddAfter(node, Operation(Instruction.ShiftLeft, dest, dest, Const(32))); + node = nodes.AddAfter(node, Operation(Instruction.BitwiseOr, dest, dest, rcx)); operation.SetDestinations(new Operand[] { eax, ebx, ecx, edx }); @@ -310,10 +311,10 @@ namespace ARMeilleure.CodeGen.X86 Operand rax = Gpr(X86Register.Rax, src1.Type); Operand rdx = Gpr(X86Register.Rdx, src1.Type); - nodes.AddBefore(node, new Operation(Instruction.Copy, rax, src1)); - nodes.AddBefore(node, new Operation(Instruction.Clobber, rdx)); + nodes.AddBefore(node, Operation(Instruction.Copy, rax, src1)); + nodes.AddBefore(node, Operation(Instruction.Clobber, rdx)); - node = nodes.AddAfter(node, new Operation(Instruction.Copy, dest, rax)); + node = nodes.AddAfter(node, Operation(Instruction.Copy, dest, rax)); operation.SetDestinations(new Operand[] { rdx, rax }); @@ -337,7 +338,7 @@ namespace ARMeilleure.CodeGen.X86 { Operand xmm0 = Xmm(X86Register.Xmm0, OperandType.V128); - nodes.AddBefore(node, new Operation(Instruction.Copy, xmm0, operation.GetSource(2))); + nodes.AddBefore(node, Operation(Instruction.Copy, xmm0, operation.GetSource(2))); operation.SetSource(2, xmm0); } @@ -357,11 +358,11 @@ namespace ARMeilleure.CodeGen.X86 Operand rax = Gpr(X86Register.Rax, src1.Type); Operand rdx = Gpr(X86Register.Rdx, src1.Type); - nodes.AddBefore(node, new Operation(Instruction.Copy, rax, src1)); + nodes.AddBefore(node, Operation(Instruction.Copy, rax, src1)); operation.SetSource(0, rax); - node = nodes.AddAfter(node, new Operation(Instruction.Copy, dest, rdx)); + node = nodes.AddAfter(node, Operation(Instruction.Copy, dest, rdx)); operation.SetDestinations(new Operand[] { rdx, rax }); @@ -378,7 +379,7 @@ namespace ARMeilleure.CodeGen.X86 { Operand rcx = Gpr(X86Register.Rcx, OperandType.I32); - nodes.AddBefore(node, new Operation(Instruction.Copy, rcx, operation.GetSource(1))); + nodes.AddBefore(node, Operation(Instruction.Copy, rcx, operation.GetSource(1))); operation.SetSource(1, rcx); } @@ -427,17 +428,17 @@ namespace ARMeilleure.CodeGen.X86 // local would be overwritten. Operand temp = Local(dest.Type); - nodes.AddBefore(node, new Operation(Instruction.Copy, temp, src1)); + nodes.AddBefore(node, Operation(Instruction.Copy, temp, src1)); operation.SetSource(0, temp); - node = nodes.AddAfter(node, new Operation(Instruction.Copy, dest, temp)); + node = nodes.AddAfter(node, Operation(Instruction.Copy, dest, temp)); operation.Destination = temp; } else { - nodes.AddBefore(node, new Operation(Instruction.Copy, dest, src1)); + nodes.AddBefore(node, Operation(Instruction.Copy, dest, src1)); operation.SetSource(0, dest); } @@ -451,17 +452,17 @@ namespace ARMeilleure.CodeGen.X86 { Operand temp = Local(dest.Type); - nodes.AddBefore(node, new Operation(Instruction.Copy, temp, src3)); + nodes.AddBefore(node, Operation(Instruction.Copy, temp, src3)); operation.SetSource(2, temp); - node = nodes.AddAfter(node, new Operation(Instruction.Copy, dest, temp)); + node = nodes.AddAfter(node, Operation(Instruction.Copy, dest, temp)); operation.Destination = temp; } else { - nodes.AddBefore(node, new Operation(Instruction.Copy, dest, src3)); + nodes.AddBefore(node, Operation(Instruction.Copy, dest, src3)); operation.SetSource(2, dest); } @@ -488,8 +489,8 @@ namespace ARMeilleure.CodeGen.X86 // and then use the 64-bits signed conversion instructions. Operand zex = Local(OperandType.I64); - node = nodes.AddAfter(node, new Operation(Instruction.ZeroExtend32, zex, source)); - node = nodes.AddAfter(node, new Operation(Instruction.ConvertToFP, dest, zex)); + node = nodes.AddAfter(node, Operation(Instruction.ZeroExtend32, zex, source)); + node = nodes.AddAfter(node, Operation(Instruction.ConvertToFP, dest, zex)); } else /* if (source.Type == OperandType.I64) */ { @@ -508,17 +509,17 @@ namespace ARMeilleure.CodeGen.X86 Operand lsbF = Local(dest.Type); - node = nodes.AddAfter(node, new Operation(Instruction.Copy, lsb, source)); - node = nodes.AddAfter(node, new Operation(Instruction.Copy, half, source)); + node = nodes.AddAfter(node, Operation(Instruction.Copy, lsb, source)); + node = nodes.AddAfter(node, Operation(Instruction.Copy, half, source)); - node = nodes.AddAfter(node, new Operation(Instruction.BitwiseAnd, lsb, lsb, Const(1L))); - node = nodes.AddAfter(node, new Operation(Instruction.ShiftRightUI, half, half, Const(1))); + node = nodes.AddAfter(node, Operation(Instruction.BitwiseAnd, lsb, lsb, Const(1L))); + node = nodes.AddAfter(node, Operation(Instruction.ShiftRightUI, half, half, Const(1))); - node = nodes.AddAfter(node, new Operation(Instruction.ConvertToFP, lsbF, lsb)); - node = nodes.AddAfter(node, new Operation(Instruction.ConvertToFP, dest, half)); + node = nodes.AddAfter(node, Operation(Instruction.ConvertToFP, lsbF, lsb)); + node = nodes.AddAfter(node, Operation(Instruction.ConvertToFP, dest, half)); - node = nodes.AddAfter(node, new Operation(Instruction.Add, dest, dest, dest)); - node = nodes.AddAfter(node, new Operation(Instruction.Add, dest, dest, lsbF)); + node = nodes.AddAfter(node, Operation(Instruction.Add, dest, dest, dest)); + node = nodes.AddAfter(node, Operation(Instruction.Add, dest, dest, lsbF)); } Delete(nodes, currentNode, operation); @@ -541,7 +542,7 @@ namespace ARMeilleure.CodeGen.X86 Operand res = Local(dest.Type); - node = nodes.AddAfter(node, new Operation(Instruction.VectorOne, res)); + node = nodes.AddAfter(node, Operation(Instruction.VectorOne, res)); if (dest.Type == OperandType.FP32) { @@ -554,7 +555,7 @@ namespace ARMeilleure.CodeGen.X86 node = nodes.AddAfter(node, new IntrinsicOperation(Intrinsic.X86Xorps, res, res, source)); - node = nodes.AddAfter(node, new Operation(Instruction.Copy, dest, res)); + node = nodes.AddAfter(node, Operation(Instruction.Copy, dest, res)); Delete(nodes, currentNode, operation); @@ -580,26 +581,26 @@ namespace ARMeilleure.CodeGen.X86 Operand temp1 = Local(OperandType.I32); Operand temp2 = Local(OperandType.I32); - node = nodes.AddAfter(node, new Operation(Instruction.Copy, temp2, src2)); + node = nodes.AddAfter(node, Operation(Instruction.Copy, temp2, src2)); - Operation vextOp = new Operation(Instruction.VectorExtract16, temp1, src1, Const(index >> 1)); + Operation vextOp = Operation(Instruction.VectorExtract16, temp1, src1, Const(index >> 1)); node = nodes.AddAfter(node, vextOp); if ((index & 1) != 0) { - node = nodes.AddAfter(node, new Operation(Instruction.ZeroExtend8, temp1, temp1)); - node = nodes.AddAfter(node, new Operation(Instruction.ShiftLeft, temp2, temp2, Const(8))); - node = nodes.AddAfter(node, new Operation(Instruction.BitwiseOr, temp1, temp1, temp2)); + node = nodes.AddAfter(node, Operation(Instruction.ZeroExtend8, temp1, temp1)); + node = nodes.AddAfter(node, Operation(Instruction.ShiftLeft, temp2, temp2, Const(8))); + node = nodes.AddAfter(node, Operation(Instruction.BitwiseOr, temp1, temp1, temp2)); } else { - node = nodes.AddAfter(node, new Operation(Instruction.ZeroExtend8, temp2, temp2)); - node = nodes.AddAfter(node, new Operation(Instruction.BitwiseAnd, temp1, temp1, Const(0xff00))); - node = nodes.AddAfter(node, new Operation(Instruction.BitwiseOr, temp1, temp1, temp2)); + node = nodes.AddAfter(node, Operation(Instruction.ZeroExtend8, temp2, temp2)); + node = nodes.AddAfter(node, Operation(Instruction.BitwiseAnd, temp1, temp1, Const(0xff00))); + node = nodes.AddAfter(node, Operation(Instruction.BitwiseOr, temp1, temp1, temp2)); } - Operation vinsOp = new Operation(Instruction.VectorInsert16, dest, src1, temp1, Const(index >> 1)); + Operation vinsOp = Operation(Instruction.VectorInsert16, dest, src1, temp1, Const(index >> 1)); node = nodes.AddAfter(node, vinsOp); @@ -643,7 +644,7 @@ namespace ARMeilleure.CodeGen.X86 arg0Reg = Gpr(CallingConvention.GetIntArgumentRegister(0), OperandType.I64); - Operation allocOp = new Operation(Instruction.StackAlloc, arg0Reg, Const(stackOffset)); + Operation allocOp = Operation(Instruction.StackAlloc, arg0Reg, Const(stackOffset)); nodes.AddBefore(node, allocOp); @@ -678,9 +679,9 @@ namespace ARMeilleure.CodeGen.X86 int stackOffset = AllocateOnStack(source.Type.GetSizeInBytes()); - nodes.AddBefore(node, new Operation(Instruction.StackAlloc, stackAddr, Const(stackOffset))); + nodes.AddBefore(node, Operation(Instruction.StackAlloc, stackAddr, Const(stackOffset))); - Operation storeOp = new Operation(Instruction.Store, null, stackAddr, source); + Operation storeOp = Operation(Instruction.Store, null, stackAddr, source); HandleConstantCopy(nodes, nodes.AddBefore(node, storeOp), storeOp); @@ -706,7 +707,7 @@ namespace ARMeilleure.CodeGen.X86 argReg = Xmm(CallingConvention.GetVecArgumentRegister(argIndex), source.Type); } - Operation copyOp = new Operation(Instruction.Copy, argReg, source); + Operation copyOp = Operation(Instruction.Copy, argReg, source); HandleConstantCopy(nodes, nodes.AddBefore(node, copyOp), copyOp); @@ -719,9 +720,9 @@ namespace ARMeilleure.CodeGen.X86 { Operand source = operation.GetSource(index + 1); - Operand offset = new Operand((index + retArgs) * 8); + Operand offset = Const((index + retArgs) * 8); - Operation spillOp = new Operation(Instruction.SpillArg, null, offset, source); + Operation spillOp = Operation(Instruction.SpillArg, null, offset, source); HandleConstantCopy(nodes, nodes.AddBefore(node, spillOp), spillOp); } @@ -732,9 +733,9 @@ namespace ARMeilleure.CodeGen.X86 { Operand retValueAddr = Local(OperandType.I64); - nodes.AddBefore(node, new Operation(Instruction.Copy, retValueAddr, arg0Reg)); + nodes.AddBefore(node, Operation(Instruction.Copy, retValueAddr, arg0Reg)); - Operation loadOp = new Operation(Instruction.Load, dest, retValueAddr); + Operation loadOp = Operation(Instruction.Load, dest, retValueAddr); node = nodes.AddAfter(node, loadOp); @@ -746,7 +747,7 @@ namespace ARMeilleure.CodeGen.X86 ? Gpr(CallingConvention.GetIntReturnRegister(), dest.Type) : Xmm(CallingConvention.GetVecReturnRegister(), dest.Type); - Operation copyOp = new Operation(Instruction.Copy, dest, retReg); + Operation copyOp = Operation(Instruction.Copy, dest, retReg); node = nodes.AddAfter(node, copyOp); @@ -803,8 +804,8 @@ namespace ARMeilleure.CodeGen.X86 Operand argReg = Gpr(CallingConvention.GetIntArgumentRegister(intCount++), OperandType.I64); Operand argReg2 = Gpr(CallingConvention.GetIntArgumentRegister(intCount++), OperandType.I64); - nodes.AddBefore(node, new Operation(Instruction.VectorExtract, argReg, source, Const(0))); - nodes.AddBefore(node, new Operation(Instruction.VectorExtract, argReg2, source, Const(1))); + nodes.AddBefore(node, Operation(Instruction.VectorExtract, argReg, source, Const(0))); + nodes.AddBefore(node, Operation(Instruction.VectorExtract, argReg2, source, Const(1))); continue; } @@ -815,7 +816,7 @@ namespace ARMeilleure.CodeGen.X86 ? Gpr(CallingConvention.GetIntArgumentRegister(intCount++), source.Type) : Xmm(CallingConvention.GetVecArgumentRegister(vecCount++), source.Type); - Operation copyOp = new Operation(Instruction.Copy, argReg, source); + Operation copyOp = Operation(Instruction.Copy, argReg, source); HandleConstantCopy(nodes, nodes.AddBefore(node, copyOp), copyOp); @@ -823,9 +824,9 @@ namespace ARMeilleure.CodeGen.X86 } else { - Operand offset = new Operand(stackOffset); + Operand offset = Const(stackOffset); - Operation spillOp = new Operation(Instruction.SpillArg, null, offset, source); + Operation spillOp = Operation(Instruction.SpillArg, null, offset, source); HandleConstantCopy(nodes, nodes.AddBefore(node, spillOp), spillOp); @@ -840,8 +841,8 @@ namespace ARMeilleure.CodeGen.X86 Operand retLReg = Gpr(CallingConvention.GetIntReturnRegister(), OperandType.I64); Operand retHReg = Gpr(CallingConvention.GetIntReturnRegisterHigh(), OperandType.I64); - node = nodes.AddAfter(node, new Operation(Instruction.VectorCreateScalar, dest, retLReg)); - node = nodes.AddAfter(node, new Operation(Instruction.VectorInsert, dest, dest, retHReg, Const(1))); + node = nodes.AddAfter(node, Operation(Instruction.VectorCreateScalar, dest, retLReg)); + node = nodes.AddAfter(node, Operation(Instruction.VectorInsert, dest, dest, retHReg, Const(1))); operation.Destination = null; } @@ -851,7 +852,7 @@ namespace ARMeilleure.CodeGen.X86 ? Gpr(CallingConvention.GetIntReturnRegister(), dest.Type) : Xmm(CallingConvention.GetVecReturnRegister(), dest.Type); - Operation copyOp = new Operation(Instruction.Copy, dest, retReg); + Operation copyOp = Operation(Instruction.Copy, dest, retReg); node = nodes.AddAfter(node, copyOp); @@ -900,8 +901,8 @@ namespace ARMeilleure.CodeGen.X86 Operand argReg = Gpr(CallingConvention.GetIntArgumentRegister(intCount++), OperandType.I64); Operand argReg2 = Gpr(CallingConvention.GetIntArgumentRegister(intCount++), OperandType.I64); - nodes.AddBefore(node, new Operation(Instruction.VectorExtract, argReg, source, Const(0))); - nodes.AddBefore(node, new Operation(Instruction.VectorExtract, argReg2, source, Const(1))); + nodes.AddBefore(node, Operation(Instruction.VectorExtract, argReg, source, Const(0))); + nodes.AddBefore(node, Operation(Instruction.VectorExtract, argReg2, source, Const(1))); continue; } @@ -912,7 +913,7 @@ namespace ARMeilleure.CodeGen.X86 ? Gpr(CallingConvention.GetIntArgumentRegister(intCount++), source.Type) : Xmm(CallingConvention.GetVecArgumentRegister(vecCount++), source.Type); - Operation copyOp = new Operation(Instruction.Copy, argReg, source); + Operation copyOp = Operation(Instruction.Copy, argReg, source); HandleConstantCopy(nodes, nodes.AddBefore(node, copyOp), copyOp); @@ -929,7 +930,7 @@ namespace ARMeilleure.CodeGen.X86 // callee saved register (which would be trashed on the epilogue). Operand retReg = Gpr(CallingConvention.GetIntReturnRegister(), OperandType.I64); - Operation addrCopyOp = new Operation(Instruction.Copy, retReg, operation.GetSource(0)); + Operation addrCopyOp = Operation(Instruction.Copy, retReg, operation.GetSource(0)); nodes.AddBefore(node, addrCopyOp); @@ -960,7 +961,7 @@ namespace ARMeilleure.CodeGen.X86 ? Gpr(CallingConvention.GetIntArgumentRegister(index), source.Type) : Xmm(CallingConvention.GetVecArgumentRegister(index), source.Type); - Operation copyOp = new Operation(Instruction.Copy, argReg, source); + Operation copyOp = Operation(Instruction.Copy, argReg, source); HandleConstantCopy(nodes, nodes.AddBefore(node, copyOp), copyOp); @@ -972,7 +973,7 @@ namespace ARMeilleure.CodeGen.X86 // callee saved register (which would be trashed on the epilogue). Operand retReg = Gpr(CallingConvention.GetIntReturnRegister(), OperandType.I64); - Operation addrCopyOp = new Operation(Instruction.Copy, retReg, operation.GetSource(0)); + Operation addrCopyOp = Operation(Instruction.Copy, retReg, operation.GetSource(0)); nodes.AddBefore(node, addrCopyOp); @@ -1023,14 +1024,14 @@ namespace ARMeilleure.CodeGen.X86 pArg = Local(dest.Type); } - Operation copyOp = new Operation(Instruction.Copy, pArg, argReg); + Operation copyOp = Operation(Instruction.Copy, pArg, argReg); cctx.Cfg.Entry.Operations.AddFirst(copyOp); preservedArgs[index] = pArg; } - Operation argCopyOp = new Operation(dest.Type == OperandType.V128 + Operation argCopyOp = Operation(dest.Type == OperandType.V128 ? Instruction.Load : Instruction.Copy, dest, preservedArgs[index]); @@ -1107,8 +1108,8 @@ namespace ARMeilleure.CodeGen.X86 Operand argLReg = Gpr(CallingConvention.GetIntArgumentRegister(intCount), OperandType.I64); Operand argHReg = Gpr(CallingConvention.GetIntArgumentRegister(intCount + 1), OperandType.I64); - Operation copyL = new Operation(Instruction.VectorCreateScalar, pArg, argLReg); - Operation copyH = new Operation(Instruction.VectorInsert, pArg, pArg, argHReg, Const(1)); + Operation copyL = Operation(Instruction.VectorCreateScalar, pArg, argLReg); + Operation copyH = Operation(Instruction.VectorInsert, pArg, pArg, argHReg, Const(1)); cctx.Cfg.Entry.Operations.AddFirst(copyH); cctx.Cfg.Entry.Operations.AddFirst(copyL); @@ -1123,7 +1124,7 @@ namespace ARMeilleure.CodeGen.X86 ? Gpr(CallingConvention.GetIntArgumentRegister(intCount), dest.Type) : Xmm(CallingConvention.GetVecArgumentRegister(vecCount), dest.Type); - Operation copyOp = new Operation(Instruction.Copy, pArg, argReg); + Operation copyOp = Operation(Instruction.Copy, pArg, argReg); cctx.Cfg.Entry.Operations.AddFirst(copyOp); @@ -1131,7 +1132,7 @@ namespace ARMeilleure.CodeGen.X86 } } - Operation argCopyOp = new Operation(Instruction.Copy, dest, preservedArgs[index]); + Operation argCopyOp = Operation(Instruction.Copy, dest, preservedArgs[index]); nodes.AddBefore(node, argCopyOp); @@ -1171,7 +1172,7 @@ namespace ARMeilleure.CodeGen.X86 Operand arg0 = Gpr(CallingConvention.GetIntArgumentRegister(0), OperandType.I64); - Operation copyOp = new Operation(Instruction.Copy, preservedArg, arg0); + Operation copyOp = Operation(Instruction.Copy, preservedArg, arg0); cctx.Cfg.Entry.Operations.AddFirst(copyOp); @@ -1187,18 +1188,18 @@ namespace ARMeilleure.CodeGen.X86 if (source.Type == OperandType.V128) { - Operation retStoreOp = new Operation(Instruction.Store, null, retReg, source); + Operation retStoreOp = Operation(Instruction.Store, null, retReg, source); nodes.AddBefore(node, retStoreOp); } else { - Operation retCopyOp = new Operation(Instruction.Copy, retReg, source); + Operation retCopyOp = Operation(Instruction.Copy, retReg, source); nodes.AddBefore(node, retCopyOp); } - operation.SetSources(System.Array.Empty<Operand>()); + operation.SetSources(Array.Empty<Operand>()); } private static void HandleReturnSystemVAbi(IntrusiveList<Node> nodes, Node node, Operation operation) @@ -1215,8 +1216,8 @@ namespace ARMeilleure.CodeGen.X86 Operand retLReg = Gpr(CallingConvention.GetIntReturnRegister(), OperandType.I64); Operand retHReg = Gpr(CallingConvention.GetIntReturnRegisterHigh(), OperandType.I64); - nodes.AddBefore(node, new Operation(Instruction.VectorExtract, retLReg, source, Const(0))); - nodes.AddBefore(node, new Operation(Instruction.VectorExtract, retHReg, source, Const(1))); + nodes.AddBefore(node, Operation(Instruction.VectorExtract, retLReg, source, Const(0))); + nodes.AddBefore(node, Operation(Instruction.VectorExtract, retHReg, source, Const(1))); } else { @@ -1224,7 +1225,7 @@ namespace ARMeilleure.CodeGen.X86 ? Gpr(CallingConvention.GetIntReturnRegister(), source.Type) : Xmm(CallingConvention.GetVecReturnRegister(), source.Type); - Operation retCopyOp = new Operation(Instruction.Copy, retReg, source); + Operation retCopyOp = Operation(Instruction.Copy, retReg, source); nodes.AddBefore(node, retCopyOp); } @@ -1236,7 +1237,7 @@ namespace ARMeilleure.CodeGen.X86 Operand intConst = AddCopy(nodes, node, GetIntConst(source)); - Operation copyOp = new Operation(Instruction.VectorCreateScalar, temp, intConst); + Operation copyOp = Operation(Instruction.VectorCreateScalar, temp, intConst); nodes.AddBefore(node, copyOp); @@ -1247,7 +1248,7 @@ namespace ARMeilleure.CodeGen.X86 { Operand temp = Local(source.Type); - Operation copyOp = new Operation(Instruction.Copy, temp, source); + Operation copyOp = Operation(Instruction.Copy, temp, source); nodes.AddBefore(node, copyOp); diff --git a/ARMeilleure/CodeGen/X86/X86Optimizer.cs b/ARMeilleure/CodeGen/X86/X86Optimizer.cs index c52541ca..30fd6c71 100644 --- a/ARMeilleure/CodeGen/X86/X86Optimizer.cs +++ b/ARMeilleure/CodeGen/X86/X86Optimizer.cs @@ -3,6 +3,7 @@ using ARMeilleure.IntermediateRepresentation; using ARMeilleure.Translation; using static ARMeilleure.IntermediateRepresentation.OperandHelper; +using static ARMeilleure.IntermediateRepresentation.OperationHelper; namespace ARMeilleure.CodeGen.X86 { @@ -34,7 +35,7 @@ namespace ARMeilleure.CodeGen.X86 { Operand temp = Local(src1.Type); - Operation copyOp = new Operation(Instruction.Copy, temp, src1); + Operation copyOp = Operation(Instruction.Copy, temp, src1); block.Operations.AddBefore(operation, copyOp); @@ -45,7 +46,7 @@ namespace ARMeilleure.CodeGen.X86 { Operand temp = Local(src2.Type); - Operation copyOp = new Operation(Instruction.Copy, temp, src2); + Operation copyOp = Operation(Instruction.Copy, temp, src2); block.Operations.AddBefore(operation, copyOp); @@ -110,7 +111,7 @@ namespace ARMeilleure.CodeGen.X86 return null; } - return new MemoryOperand(type, baseOp, indexOp, scale, imm); + return MemoryOp(type, baseOp, indexOp, scale, imm); } private static int GetConstOp(ref Operand baseOp) |
