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path: root/ARMeilleure/CodeGen/X86
AgeCommit message (Expand)Author
2023-04-27Move solution and projects to srcTSR Berry
2023-04-10ARMeilleure: Respect FZ/RM flags for all floating point operations (#4618)riperiperi
2023-03-22ARMeilleure: Check for `XSAVE` cpuid flag for AVX{2,512} (#4584)Wunk
2023-03-20ARMeilleure: Add initial support for AVX512 (EVEX encoding) (cont) (#4147)Wunk
2023-03-17Reducing memory allocations (#4537)jhorv
2023-03-08CPU: Avoid argument value copies on the JIT (#4484)gdkchan
2023-01-10Implement JIT Arm64 backend (#4114)gdkchan
2022-12-19Eliminate zero-extension moves in more cases on 32-bit games (#4140)gdkchan
2022-12-18Revert "ARMeilleure: Add initial support for AVX512(EVEX encoding) (#3663)" (...gdkchan
2022-12-18ARMeilleure: Add initial support for AVX512(EVEX encoding) (#3663)Wunk
2022-12-05Make structs readonly when applicable (#4002)Andrey Sukharev
2022-10-02ARMeilleure: Add `gfni` acceleration (#3669)Wunk
2022-08-25ARMeilleure: Hardware accelerate SHA256 (#3585)merry
2022-08-18Removed unused usings. (#3593)Nicholas Rodine
2022-08-14PreAllocator: Check if instruction supports a Vex prefix in IsVexSameOperandD...merry
2022-02-09Add a limit on the number of uses a constant may have (#3097)gdkchan
2022-01-24Fix calls passing V128 values on Linux (#3034)gdkchan
2022-01-21Add host CPU memory barriers for DMB/DSB and ordered load/store (#3015)gdkchan
2021-12-04misc: Migrate usage of RuntimeInformation to OperatingSystem (#2901)Mary
2021-10-05Add `Operand.Label` support to `Assembler` (#2680)FICTURE7
2021-09-29Optimize `HybridAllocator` (#2637)FICTURE7
2021-09-14Refactor `PtcInfo` (#2625)FICTURE7
2021-08-17Reduce JIT GC allocations (#2515)FICTURE7
2021-05-29Add multi-level function table (#2228)FICTURE7
2021-05-13Fold constant offsets and group constant addresses (#2285)gdkchan
2021-04-07(CPU) Fix CRC32 instruction when constant values are used as input (#2183)gdkchan
2021-02-23PPTC: Fix unwanted propagation of a relocatable constant in a specific case. ...LDj3SNuD
2021-02-22PPTC & Pool Enhancements. (#1968)LDj3SNuD
2021-02-08Optimization | Modify Add (Integer) Instruction to use LEA instead. (#1971)sharmander
2021-01-20CPU (A64): Add Fmaxnmp & Fminnmp Scalar Inst.s, Fast & Slow Paths; with Tests...LDj3SNuD
2020-12-17Fix Vnmls_S fast path (F64: losing input d value). Fix Vnmla_S & Vnmls_S slow...LDj3SNuD
2020-12-15CPU: Implement VFMA (Vector) (#1762)sharmander
2020-12-14Fix pre-allocator shift instruction copy on a specific case (#1752)gdkchan
2020-12-07CPU: Implement VFNMA.F32 | F.64 (#1783)sharmander
2020-12-07Add support for guest Fz (Fpcr) mode through host Ftz and Daz (Mxcsr) modes (...LDj3SNuD
2020-12-03CPU: Implement VFNMS.F32/64 (#1758)sharmander
2020-11-18CPU (A64): Add FP16/FP32 fast paths (F16C Intrinsics) for Fcvt_S, Fcvtl_V & F...LDj3SNuD
2020-09-19Implement block placement (#1549)FICTURE7
2020-09-12Relax block ordering constraints (#1535)FICTURE7
2020-08-05Improve branch operations (#1442)Ficture Seven
2020-07-30 Implement inline memory load/store exclusive and ordered (#1413)gdkchan
2020-07-30Use movd,movq for i32/64 VectorExtract %x, 0x0 (#1439)Ficture Seven
2020-07-13Add SSE4.2 Path for CRC32, add A32 variant, add tests for non-castagnoli vari...riperiperi
2020-07-11Mask shift constants on x86 backend (#1382)gdkchan
2020-07-09Fix PPTC on Windows 7. (#1369)LDj3SNuD
2020-06-16Add Profiled Persistent Translation Cache. (#769)LDj3SNuD
2020-06-05Faster crc32 implementation (#1294)merry
2020-05-15Unwinding Follow-up. Fix a bug in JitUnwindWindows where ... (#1238)LDj3SNuD
2020-05-13Remove CpuId IR instruction (#1227)gdkchan
2020-05-04Implement a new physical memory manager and replace DeviceMemory (#856)gdkchan
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