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shader/image: Implement SULD and fix SUATOM
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Implement a MME Draw commands Inliner and correct host instance drawing
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shader_ir: Implement ICMP
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In the process remove implementation of SUATOM.MIN and SUATOM.MAX as
these require a distinction between U32 and S32. These have to be
implemented with imageCompSwap loop.
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* Implement SULD as float.
* Remove conditional declaration of GL_ARB_shader_viewport_layer_array.
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shader_ir/warp: Implement SHFL for Nvidia devices
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management.
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shader_ir: Implement shared memory
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shader/shift: Implement SHR wrapped and clamped variants
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Loads from shared memory.
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This instruction writes to a memory buffer shared with threads within
the same work group. It is known as "shared" memory in GLSL.
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Nvidia defaults to wrapped shifts, but this is undefined behaviour on
OpenGL's spec. Explicitly mask/clamp according to what the guest shader
requires.
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shader_ir/conversion: Implement F2I and F2F F16 selector
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float_set_predicate: Add missing negation bit for the second operand
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* texture_cache/surface_params: Remove unused local variable
* rasterizer_interface: Add missing documentation commentary
* maxwell_dma: Remove unused rasterizer reference
* video_core/gpu: Sort member declaration order to silent -Wreorder warning
* fermi_2d: Remove unused MemoryManager reference
* video_core: Silent unused variable warnings
* buffer_cache: Silent -Wreorder warnings
* kepler_memory: Remove unused MemoryManager reference
* gl_texture_cache: Add missing override
* buffer_cache: Add missing include
* shader/decode: Remove unused variables
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shader/decode: Implement S2R Tic
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Implement VOTE using Nvidia's intrinsics. Documentation about these can
be found here
https://developer.nvidia.com/reading-between-threads-shader-intrinsics
Instead of using portable ARB instructions I opted to use Nvidia
intrinsics because these are the closest we have to how Tegra X1
hardware renders.
To stub VOTE on non-Nvidia drivers (including nouveau) this commit
simulates a GPU with a warp size of one, returning what is meaningful
for the instruction being emulated:
* anyThreadNV(value) -> value
* allThreadsNV(value) -> value
* allThreadsEqualNV(value) -> true
ballotARB, also known as "uint64_t(activeThreadsNV())", emits
VOTE.ANY Rd, PT, PT;
on nouveau's compiler. This doesn't match exactly to Nvidia's code
VOTE.ALL Rd, PT, PT;
Which is emulated with activeThreadsNV() by this commit. In theory this
shouldn't really matter since .ANY, .ALL and .EQ affect the predicates
(set to PT on those cases) and not the registers.
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half_set_predicate: Fix HSETP2_C constant buffer offset
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Shader_Ir: Implement F16 Variants of F2F, F2I, I2F.
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shader_ir: Implement NOP
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video_core/control_flow: Minor changes/warning cleanup
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Shader_Ir: Correct tracking to track from right to left
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Downgrade and suppress a series of GPU asserts and debug messages.
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This commit takes care of implementing the F16 Variants of the
conversion instructions and makes sure conversions are done.
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Provides operational symmetry for the respective structures.
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The return value is a u32, not an s32, so this would result in an
implicit signedness conversion.
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This is the default behavior of the copy constructor, so it doesn't need
to be specified.
While we're at it we can make the other non-default constructor
explicit.
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Results in less work being done where avoidable.
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Same thing, but potentially allows a standard library implementation to
pick a more efficient codepath.
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It's what it's there for.
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Ensures that the constructor members are always initialized in the order
that they're declared in.
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Prevents a truncation warning from occurring with MSVC. Also the
internal data structures already treat it as a size_t, so this is just a
discrepancy in the interface.
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an anonymous namespace
Previously, quite a few functions were being linked with external
linkage.
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