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2019-09-01Merge pull request #2765 from FernandoS27/dma-fixbunnei
MaxwellDMA: Fixes, corrections and relaxations.
2019-08-30video_core: Silent miscellaneous warnings (#2820)Rodrigo Locatti
* texture_cache/surface_params: Remove unused local variable * rasterizer_interface: Add missing documentation commentary * maxwell_dma: Remove unused rasterizer reference * video_core/gpu: Sort member declaration order to silent -Wreorder warning * fermi_2d: Remove unused MemoryManager reference * video_core: Silent unused variable warnings * buffer_cache: Silent -Wreorder warnings * kepler_memory: Remove unused MemoryManager reference * gl_texture_cache: Add missing override * buffer_cache: Add missing include * shader/decode: Remove unused variables
2019-08-21shader_ir: Implement VOTEReinUsesLisp
Implement VOTE using Nvidia's intrinsics. Documentation about these can be found here https://developer.nvidia.com/reading-between-threads-shader-intrinsics Instead of using portable ARB instructions I opted to use Nvidia intrinsics because these are the closest we have to how Tegra X1 hardware renders. To stub VOTE on non-Nvidia drivers (including nouveau) this commit simulates a GPU with a warp size of one, returning what is meaningful for the instruction being emulated: * anyThreadNV(value) -> value * allThreadsNV(value) -> value * allThreadsEqualNV(value) -> true ballotARB, also known as "uint64_t(activeThreadsNV())", emits VOTE.ANY Rd, PT, PT; on nouveau's compiler. This doesn't match exactly to Nvidia's code VOTE.ALL Rd, PT, PT; Which is emulated with activeThreadsNV() by this commit. In theory this shouldn't really matter since .ANY, .ALL and .EQ affect the predicates (set to PT on those cases) and not the registers.
2019-08-21Merge pull request #2753 from FernandoS27/float-convertbunnei
Shader_Ir: Implement F16 Variants of F2F, F2I, I2F.
2019-08-04shader_ir: Implement NOPReinUsesLisp
2019-07-26Merge pull request #2592 from FernandoS27/sync1bunnei
Implement GPU Synchronization Mechanisms & Correct NVFlinger
2019-07-25MaxwellDMA: Fixes, corrections and relaxations.Fernando Sahmkow
This commit fixes offsets on Linear -> Tiled copies, corrects z pos fortiled->linear copies, corrects bytes_per_pixel calculation in tiled -> linear copies and relaxes some limitations set by latest dma fixes refactors.
2019-07-25Merge pull request #2743 from FernandoS27/surpress-assertbunnei
Downgrade and suppress a series of GPU asserts and debug messages.
2019-07-24Merge pull request #2704 from FernandoS27/conditionalbunnei
maxwell3d: Implement Conditional Rendering
2019-07-22Merge pull request #2734 from ReinUsesLisp/compute-shadersbunnei
gl_rasterizer: Implement compute shaders
2019-07-21Merge pull request #2735 from FernandoS27/pipeline-reworkbunnei
Rework Dirty Flags in GPU Pipeline, Optimize CBData and Redo Clearing mechanism
2019-07-20Shader_Ir: Implement F16 Variants of F2F, F2I, I2F.Fernando Sahmkow
This commit takes care of implementing the F16 Variants of the conversion instructions and makes sure conversions are done.
2019-07-20Maxwell3D: Reorganize and address feedbackFernando Sahmkow
2019-07-19shader/half_set_predicate: Implement missing HSETP2 variantsReinUsesLisp
2019-07-18MaxwellDMA/KeplerCopy: Downgrade DMA log message to Trace.Fernando Sahmkow
This log was just to know which games used DMA. It's no longer important.
2019-07-17GL_State: Feedback and fixesFernando Sahmkow
2019-07-17Maxwell3D: Address FeedbackFernando Sahmkow
2019-07-17GL_Rasterizer: Corrections to Clearing.Fernando Sahmkow
2019-07-17Maxwell3D: Correct marking dirtiness on CB uploadFernando Sahmkow
2019-07-17GL_Rasterizer: Rework RenderTarget/DepthBuffer clearingFernando Sahmkow
2019-07-17Maxwell3D: Implement State Dirty Flags.Fernando Sahmkow
2019-07-17Maxwell3D: Rework CBData UploadFernando Sahmkow
2019-07-17Maxwell3D: Rework the dirty system to be more consistant and scaleableFernando Sahmkow
2019-07-17maxwell3d: Implement Conditional RenderingFernando Sahmkow
Conditional Rendering takes care of conditionaly clearing or drawing depending on a set of queries. This PR implements the query checks to stablish if things can be rendered or not.
2019-07-15gl_rasterizer: Implement compute shadersReinUsesLisp
2019-07-15Merge pull request #2695 from ReinUsesLisp/layer-viewportFernando Sahmkow
gl_shader_decompiler: Implement gl_ViewportIndex and gl_Layer in vertex shaders
2019-07-14Merge pull request #2675 from ReinUsesLisp/opengl-buffer-cachebunnei
buffer_cache: Implement a generic buffer cache and its OpenGL backend
2019-07-14Merge pull request #2692 from ReinUsesLisp/tlds-f16Fernando Sahmkow
shader/texture: Add F16 support for TLDS
2019-07-09shader_ir: Implement BRX & BRA.CCFernando Sahmkow
2019-07-07gl_shader_decompiler: Implement gl_ViewportIndex and gl_Layer in vertex shadersReinUsesLisp
This commit implements gl_ViewportIndex and gl_Layer in vertex and geometry shaders. In the case it's used in a vertex shader, it requires ARB_shader_viewport_layer_array. This extension is available on AMD and Nvidia devices (mesa and proprietary drivers), but not available on Intel on any platform. At the moment of writing this description I don't know if this is a hardware limitation or a driver limitation. In the case that ARB_shader_viewport_layer_array is not available, writes to these registers on a vertex shader are ignored, with the appropriate logging.
2019-07-07shader/texture: Add F16 support for TLDSReinUsesLisp
2019-07-06gl_rasterizer: Minor style changesReinUsesLisp
2019-07-05video_core: Implement GPU side SyncpointsFernando Sahmkow
2019-06-24shader_bytecode: Include missing <array>ReinUsesLisp
2019-06-20surface: Correct format S8Z24Fernando Sahmkow
2019-06-20decoders: correct block calculationFernando Sahmkow
2019-06-20fermi2d: Correct Origin ModeFernando Sahmkow
2019-06-20texture_cache: Fermi2D reform and implement View MirageFernando Sahmkow
This also does some fixes on compressed textures reinterpret and on the Fermi2D engine in general.
2019-06-20shader: Decode SUST and implement backing image functionalityReinUsesLisp
2019-06-20maxwell_3d: Partially implement texture buffers as 1D texturesReinUsesLisp
2019-06-20shader: Implement texture buffersReinUsesLisp
2019-06-20texture_cache: loose TryReconstructSurface when accurate GPU is not on.Fernando Sahmkow
Also corrects some asserts.
2019-06-20engine_upload: Addapt to new Texture CacheFernando Sahmkow
2019-06-20video_core: Use un-shifted block sizes to avoid integer divisionsReinUsesLisp
Instead of storing all block width, height and depths in their shifted form: block_width = 1U << block_shift; Store them like they are provided by the emulated hardware (their block_shift form). This way we can avoid doing the costly Common::AlignUp operation to align texture sizes and drop CPU integer divisions with bitwise logic (defined in Common::AlignBits).
2019-06-17Merge pull request #2562 from ReinUsesLisp/split-cbuf-uploadbunnei
video_core/engines: Move ConstBufferInfo out of Maxwell3D
2019-06-07kepler_compute: Use std::array for cbuf infoReinUsesLisp
2019-06-07kepler_compute: Fix block_dim_x encodingReinUsesLisp
2019-06-07video_core/engines: Move ConstBufferInfo out of Maxwell3DReinUsesLisp
2019-06-04shader_bytecode: Mark EXIT as flow instructionFernando Sahmkow
2019-05-20shader/memory: Implement ST (generic memory)ReinUsesLisp