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-rw-r--r--src/video_core/engines/fermi_2d.cpp13
-rw-r--r--src/video_core/engines/fermi_2d.h22
-rw-r--r--src/video_core/engines/maxwell_3d.cpp13
-rw-r--r--src/video_core/engines/maxwell_3d.h22
-rw-r--r--src/video_core/engines/maxwell_compute.cpp13
-rw-r--r--src/video_core/engines/maxwell_compute.h22
6 files changed, 105 insertions, 0 deletions
diff --git a/src/video_core/engines/fermi_2d.cpp b/src/video_core/engines/fermi_2d.cpp
new file mode 100644
index 000000000..7aab163dc
--- /dev/null
+++ b/src/video_core/engines/fermi_2d.cpp
@@ -0,0 +1,13 @@
+// Copyright 2018 yuzu Emulator Project
+// Licensed under GPLv2 or any later version
+// Refer to the license.txt file included.
+
+#include "video_core/engines/fermi_2d.h"
+
+namespace Tegra {
+namespace Engines {
+
+void Fermi2D::WriteReg(u32 method, u32 value) {}
+
+} // namespace Engines
+} // namespace Tegra
diff --git a/src/video_core/engines/fermi_2d.h b/src/video_core/engines/fermi_2d.h
new file mode 100644
index 000000000..8967ddede
--- /dev/null
+++ b/src/video_core/engines/fermi_2d.h
@@ -0,0 +1,22 @@
+// Copyright 2018 yuzu Emulator Project
+// Licensed under GPLv2 or any later version
+// Refer to the license.txt file included.
+
+#pragma once
+
+#include "common/common_types.h"
+
+namespace Tegra {
+namespace Engines {
+
+class Fermi2D final {
+public:
+ Fermi2D() = default;
+ ~Fermi2D() = default;
+
+ /// Write the value to the register identified by method.
+ void WriteReg(u32 method, u32 value);
+};
+
+} // namespace Engines
+} // namespace Tegra
diff --git a/src/video_core/engines/maxwell_3d.cpp b/src/video_core/engines/maxwell_3d.cpp
new file mode 100644
index 000000000..ccdb310f0
--- /dev/null
+++ b/src/video_core/engines/maxwell_3d.cpp
@@ -0,0 +1,13 @@
+// Copyright 2018 yuzu Emulator Project
+// Licensed under GPLv2 or any later version
+// Refer to the license.txt file included.
+
+#include "video_core/engines/maxwell_3d.h"
+
+namespace Tegra {
+namespace Engines {
+
+void Maxwell3D::WriteReg(u32 method, u32 value) {}
+
+} // namespace Engines
+} // namespace Tegra
diff --git a/src/video_core/engines/maxwell_3d.h b/src/video_core/engines/maxwell_3d.h
new file mode 100644
index 000000000..0f4ae1328
--- /dev/null
+++ b/src/video_core/engines/maxwell_3d.h
@@ -0,0 +1,22 @@
+// Copyright 2018 yuzu Emulator Project
+// Licensed under GPLv2 or any later version
+// Refer to the license.txt file included.
+
+#pragma once
+
+#include "common/common_types.h"
+
+namespace Tegra {
+namespace Engines {
+
+class Maxwell3D final {
+public:
+ Maxwell3D() = default;
+ ~Maxwell3D() = default;
+
+ /// Write the value to the register identified by method.
+ void WriteReg(u32 method, u32 value);
+};
+
+} // namespace Engines
+} // namespace Tegra
diff --git a/src/video_core/engines/maxwell_compute.cpp b/src/video_core/engines/maxwell_compute.cpp
new file mode 100644
index 000000000..e4e5f9e5e
--- /dev/null
+++ b/src/video_core/engines/maxwell_compute.cpp
@@ -0,0 +1,13 @@
+// Copyright 2018 yuzu Emulator Project
+// Licensed under GPLv2 or any later version
+// Refer to the license.txt file included.
+
+#include "video_core/engines/maxwell_compute.h"
+
+namespace Tegra {
+namespace Engines {
+
+void MaxwellCompute::WriteReg(u32 method, u32 value) {}
+
+} // namespace Engines
+} // namespace Tegra
diff --git a/src/video_core/engines/maxwell_compute.h b/src/video_core/engines/maxwell_compute.h
new file mode 100644
index 000000000..7262e1bcb
--- /dev/null
+++ b/src/video_core/engines/maxwell_compute.h
@@ -0,0 +1,22 @@
+// Copyright 2018 yuzu Emulator Project
+// Licensed under GPLv2 or any later version
+// Refer to the license.txt file included.
+
+#pragma once
+
+#include "common/common_types.h"
+
+namespace Tegra {
+namespace Engines {
+
+class MaxwellCompute final {
+public:
+ MaxwellCompute() = default;
+ ~MaxwellCompute() = default;
+
+ /// Write the value to the register identified by method.
+ void WriteReg(u32 method, u32 value);
+};
+
+} // namespace Engines
+} // namespace Tegra