video_core: Rearrange pixel format names

Normalizes pixel format names to match Vulkan names. Previous to this
commit pixel formats had no convention, leading to confusion and
potential bugs.

1 files changed, 23 insertions, 26 deletions

diff --git a/src/video_core/textures/texture.h b/src/video_core/textures/texture.h
index eba05aced..0574fef12 100644
--- a/src/video_core/textures/texture.h
+++ b/src/video_core/textures/texture.h
@@ -12,10 +12,10 @@
 namespace Tegra::Texture {
 
 enum class TextureFormat : u32 {
-    R32_G32_B32_A32 = 0x01,
-    R32_G32_B32 = 0x02,
-    R16_G16_B16_A16 = 0x03,
-    R32_G32 = 0x04,
+    R32G32B32A32 = 0x01,
+    R32G32B32 = 0x02,
+    R16G16B16A16 = 0x03,
+    R32G32 = 0x04,
     R32_B24G8 = 0x05,
     ETC2_RGB = 0x06,
     X8B8G8R8 = 0x07,
@@ -23,19 +23,19 @@ enum class TextureFormat : u32 {
     A2B10G10R10 = 0x09,
     ETC2_RGB_PTA = 0x0a,
     ETC2_RGBA = 0x0b,
-    R16_G16 = 0x0c,
-    G8R24 = 0x0d,
-    G24R8 = 0x0e,
+    R16G16 = 0x0c,
+    R24G8 = 0x0d,
+    R8G24 = 0x0e,
     R32 = 0x0f,
-    BC6H_SF16 = 0x10,
-    BC6H_UF16 = 0x11,
+    BC6H_SFLOAT = 0x10,
+    BC6H_UFLOAT = 0x11,
     A4B4G4R4 = 0x12,
     A5B5G5R1 = 0x13,
     A1B5G5R5 = 0x14,
     B5G6R5 = 0x15,
     B6G5R5 = 0x16,
-    BC7U = 0x17,
-    G8R8 = 0x18,
+    BC7 = 0x17,
+    R8G8 = 0x18,
     EAC = 0x19,
     EACX2 = 0x1a,
     R16 = 0x1b,
@@ -43,23 +43,23 @@ enum class TextureFormat : u32 {
     R8 = 0x1d,
     G4R4 = 0x1e,
     R1 = 0x1f,
-    E5B9G9R9_SHAREDEXP = 0x20,
-    BF10GF11RF11 = 0x21,
+    E5B9G9R9 = 0x20,
+    B10G11R11 = 0x21,
     G8B8G8R8 = 0x22,
     B8G8R8G8 = 0x23,
-    DXT1 = 0x24,
-    DXT23 = 0x25,
-    DXT45 = 0x26,
-    DXN1 = 0x27,
-    DXN2 = 0x28,
-    S8Z24 = 0x29,
+    BC1_RGBA = 0x24,
+    BC2 = 0x25,
+    BC3 = 0x26,
+    BC4 = 0x27,
+    BC5 = 0x28,
+    S8D24 = 0x29,
     X8Z24 = 0x2a,
-    Z24S8 = 0x2b,
+    D24S8 = 0x2b,
     X4V4Z24__COV4R4V = 0x2c,
     X4V4Z24__COV8R8V = 0x2d,
     V8Z24__COV4R12V = 0x2e,
-    ZF32 = 0x2f,
-    ZF32_X24S8 = 0x30,
+    D32 = 0x2f,
+    D32S8 = 0x30,
     X8Z24_X20V4S8__COV4R4V = 0x31,
     X8Z24_X20V4S8__COV8R8V = 0x32,
     ZF32_X20V4X8__COV4R4V = 0x33,
@@ -69,7 +69,7 @@ enum class TextureFormat : u32 {
     X8Z24_X16V8S8__COV4R12V = 0x37,
     ZF32_X16V8X8__COV4R12V = 0x38,
     ZF32_X16V8S8__COV4R12V = 0x39,
-    Z16 = 0x3a,
+    D16 = 0x3a,
     V8Z24__COV8R24V = 0x3b,
     X8Z24_X16V8S8__COV8R24V = 0x3c,
     ZF32_X16V8X8__COV8R24V = 0x3d,
@@ -375,7 +375,4 @@ struct FullTextureInfo {
     TSCEntry tsc;
 };
 
-/// Returns the number of bytes per pixel of the input texture format.
-u32 BytesPerPixel(TextureFormat format);
-
 } // namespace Tegra::Texture