aboutsummaryrefslogtreecommitdiff
path: root/src/video_core/texture_cache/image_info.h
diff options
context:
space:
mode:
authorFengChen <vonchenplus@gmail.com>2023-03-14 22:36:34 +0800
committerFengChen <vonchenplus@gmail.com>2023-03-14 22:36:34 +0800
commit11ffbee5ae4c2930936d5be9201e2a0c04706579 (patch)
tree4fadfac722f0a142c15fc4ebb9b9c75ca03eb063 /src/video_core/texture_cache/image_info.h
parent05f26e133720af796f11e8ebe2bede7448901113 (diff)
video_core: Better defined ImageInfo parameters
Diffstat (limited to 'src/video_core/texture_cache/image_info.h')
-rw-r--r--src/video_core/texture_cache/image_info.h7
1 files changed, 5 insertions, 2 deletions
diff --git a/src/video_core/texture_cache/image_info.h b/src/video_core/texture_cache/image_info.h
index a12f5b44f..4b7dfa315 100644
--- a/src/video_core/texture_cache/image_info.h
+++ b/src/video_core/texture_cache/image_info.h
@@ -17,8 +17,11 @@ using VideoCore::Surface::PixelFormat;
struct ImageInfo {
ImageInfo() = default;
explicit ImageInfo(const TICEntry& config) noexcept;
- explicit ImageInfo(const Tegra::Engines::Maxwell3D::Regs& regs, size_t index) noexcept;
- explicit ImageInfo(const Tegra::Engines::Maxwell3D::Regs& regs) noexcept;
+ explicit ImageInfo(const Tegra::Engines::Maxwell3D::Regs::RenderTargetConfig& ct,
+ Tegra::Texture::MsaaMode msaa_mode) noexcept;
+ explicit ImageInfo(const Tegra::Engines::Maxwell3D::Regs::Zeta& zt,
+ const Tegra::Engines::Maxwell3D::Regs::ZetaSize& zt_size,
+ Tegra::Texture::MsaaMode msaa_mode) noexcept;
explicit ImageInfo(const Tegra::Engines::Fermi2D::Surface& config) noexcept;
explicit ImageInfo(const Tegra::DMA::ImageOperand& config) noexcept;