diff options
| author | ReinUsesLisp <reinuseslisp@airmail.cc> | 2018-12-20 23:42:02 -0300 |
|---|---|---|
| committer | ReinUsesLisp <reinuseslisp@airmail.cc> | 2019-01-15 17:54:50 -0300 |
| commit | fbc67a05637f3acb47f933066fb2e548f9d35d8c (patch) | |
| tree | f8e100455b0317dd29e4f97dd85506258ecc1978 /src/video_core/shader/shader_ir.cpp | |
| parent | a58abbcfc4580c8d43935e2aecc6fa151509bf5b (diff) | |
shader_ir: Add condition code helper
Diffstat (limited to 'src/video_core/shader/shader_ir.cpp')
| -rw-r--r-- | src/video_core/shader/shader_ir.cpp | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/video_core/shader/shader_ir.cpp b/src/video_core/shader/shader_ir.cpp index aec1fb36b..3c37c7145 100644 --- a/src/video_core/shader/shader_ir.cpp +++ b/src/video_core/shader/shader_ir.cpp @@ -321,6 +321,16 @@ OperationCode ShaderIR::GetPredicateCombiner(PredOperation operation) { return op->second; } +Node ShaderIR::GetConditionCode(Tegra::Shader::ConditionCode cc) { + switch (cc) { + case Tegra::Shader::ConditionCode::NEU: + return GetInternalFlag(InternalFlag::Zero, true); + default: + UNIMPLEMENTED_MSG("Unimplemented condition code: {}", static_cast<u32>(cc)); + return GetPredicate(static_cast<u64>(Pred::NeverExecute)); + } +} + void ShaderIR::SetRegister(BasicBlock& bb, Register dest, Node src) { bb.push_back(Operation(OperationCode::Assign, GetRegister(dest), src)); } |
