video_core: Rewrite the texture cache

The current texture cache has several points that hurt maintainability
and performance. It's easy to break unrelated parts of the cache
when doing minor changes. The cache can easily forget valuable
information about the cached textures by CPU writes or simply by its
normal usage.The current texture cache has several points that hurt
maintainability and performance. It's easy to break unrelated parts
of the cache when doing minor changes. The cache can easily forget
valuable information about the cached textures by CPU writes or simply
by its normal usage.

This commit aims to address those issues.

1 files changed, 300 insertions, 400 deletions

diff --git a/src/video_core/renderer_vulkan/vk_rasterizer.cpp b/src/video_core/renderer_vulkan/vk_rasterizer.cpp
index f93986aab..04c5c859c 100644
--- a/src/video_core/renderer_vulkan/vk_rasterizer.cpp
+++ b/src/video_core/renderer_vulkan/vk_rasterizer.cpp
@@ -19,6 +19,7 @@
 #include "core/settings.h"
 #include "video_core/engines/kepler_compute.h"
 #include "video_core/engines/maxwell_3d.h"
+#include "video_core/renderer_vulkan/blit_image.h"
 #include "video_core/renderer_vulkan/fixed_pipeline_state.h"
 #include "video_core/renderer_vulkan/maxwell_to_vk.h"
 #include "video_core/renderer_vulkan/renderer_vulkan.h"
@@ -30,8 +31,6 @@
 #include "video_core/renderer_vulkan/vk_graphics_pipeline.h"
 #include "video_core/renderer_vulkan/vk_pipeline_cache.h"
 #include "video_core/renderer_vulkan/vk_rasterizer.h"
-#include "video_core/renderer_vulkan/vk_renderpass_cache.h"
-#include "video_core/renderer_vulkan/vk_sampler_cache.h"
 #include "video_core/renderer_vulkan/vk_scheduler.h"
 #include "video_core/renderer_vulkan/vk_staging_buffer_pool.h"
 #include "video_core/renderer_vulkan/vk_state_tracker.h"
@@ -39,10 +38,13 @@
 #include "video_core/renderer_vulkan/vk_update_descriptor.h"
 #include "video_core/renderer_vulkan/wrapper.h"
 #include "video_core/shader_cache.h"
+#include "video_core/texture_cache/texture_cache.h"
 
 namespace Vulkan {
 
 using Maxwell = Tegra::Engines::Maxwell3D::Regs;
+using VideoCommon::ImageViewId;
+using VideoCommon::ImageViewType;
 
 MICROPROFILE_DEFINE(Vulkan_WaitForWorker, "Vulkan", "Wait for worker", MP_RGB(255, 192, 192));
 MICROPROFILE_DEFINE(Vulkan_Drawing, "Vulkan", "Record drawing", MP_RGB(192, 128, 128));
@@ -58,9 +60,9 @@ MICROPROFILE_DEFINE(Vulkan_PipelineCache, "Vulkan", "Pipeline cache", MP_RGB(192
 
 namespace {
 
-constexpr auto ComputeShaderIndex = static_cast<std::size_t>(Tegra::Engines::ShaderType::Compute);
+constexpr auto COMPUTE_SHADER_INDEX = static_cast<size_t>(Tegra::Engines::ShaderType::Compute);
 
-VkViewport GetViewportState(const VKDevice& device, const Maxwell& regs, std::size_t index) {
+VkViewport GetViewportState(const VKDevice& device, const Maxwell& regs, size_t index) {
     const auto& src = regs.viewport_transform[index];
     const float width = src.scale_x * 2.0f;
     const float height = src.scale_y * 2.0f;
@@ -83,7 +85,7 @@ VkViewport GetViewportState(const VKDevice& device, const Maxwell& regs, std::si
     return viewport;
 }
 
-VkRect2D GetScissorState(const Maxwell& regs, std::size_t index) {
+VkRect2D GetScissorState(const Maxwell& regs, size_t index) {
     const auto& src = regs.scissor_test[index];
     VkRect2D scissor;
     if (src.enable) {
@@ -103,98 +105,122 @@ VkRect2D GetScissorState(const Maxwell& regs, std::size_t index) {
 std::array<GPUVAddr, Maxwell::MaxShaderProgram> GetShaderAddresses(
     const std::array<Shader*, Maxwell::MaxShaderProgram>& shaders) {
     std::array<GPUVAddr, Maxwell::MaxShaderProgram> addresses;
-    for (std::size_t i = 0; i < std::size(addresses); ++i) {
+    for (size_t i = 0; i < std::size(addresses); ++i) {
         addresses[i] = shaders[i] ? shaders[i]->GetGpuAddr() : 0;
     }
     return addresses;
 }
 
-void TransitionImages(const std::vector<ImageView>& views, VkPipelineStageFlags pipeline_stage,
-                      VkAccessFlags access) {
-    for (auto& [view, layout] : views) {
-        view->Transition(*layout, pipeline_stage, access);
+struct TextureHandle {
+    constexpr TextureHandle(u32 data, bool via_header_index) {
+        const Tegra::Texture::TextureHandle handle{data};
+        image = handle.tic_id;
+        sampler = via_header_index ? image : handle.tsc_id.Value();
     }
-}
+
+    u32 image;
+    u32 sampler;
+};
 
 template <typename Engine, typename Entry>
-Tegra::Texture::FullTextureInfo GetTextureInfo(const Engine& engine, const Entry& entry,
-                                               std::size_t stage, std::size_t index = 0) {
-    const auto stage_type = static_cast<Tegra::Engines::ShaderType>(stage);
+TextureHandle GetTextureInfo(const Engine& engine, bool via_header_index, const Entry& entry,
+                             size_t stage, size_t index = 0) {
+    const auto shader_type = static_cast<Tegra::Engines::ShaderType>(stage);
     if constexpr (std::is_same_v<Entry, SamplerEntry>) {
         if (entry.is_separated) {
             const u32 buffer_1 = entry.buffer;
             const u32 buffer_2 = entry.secondary_buffer;
             const u32 offset_1 = entry.offset;
             const u32 offset_2 = entry.secondary_offset;
-            const u32 handle_1 = engine.AccessConstBuffer32(stage_type, buffer_1, offset_1);
-            const u32 handle_2 = engine.AccessConstBuffer32(stage_type, buffer_2, offset_2);
-            return engine.GetTextureInfo(Tegra::Texture::TextureHandle{handle_1 | handle_2});
+            const u32 handle_1 = engine.AccessConstBuffer32(shader_type, buffer_1, offset_1);
+            const u32 handle_2 = engine.AccessConstBuffer32(shader_type, buffer_2, offset_2);
+            return TextureHandle(handle_1 | handle_2, via_header_index);
         }
     }
     if (entry.is_bindless) {
-        const auto tex_handle = engine.AccessConstBuffer32(stage_type, entry.buffer, entry.offset);
-        return engine.GetTextureInfo(Tegra::Texture::TextureHandle{tex_handle});
-    }
-    const auto& gpu_profile = engine.AccessGuestDriverProfile();
-    const u32 entry_offset = static_cast<u32>(index * gpu_profile.GetTextureHandlerSize());
-    const u32 offset = entry.offset + entry_offset;
-    if constexpr (std::is_same_v<Engine, Tegra::Engines::Maxwell3D>) {
-        return engine.GetStageTexture(stage_type, offset);
-    } else {
-        return engine.GetTexture(offset);
-    }
-}
-
-/// @brief Determine if an attachment to be updated has to preserve contents
-/// @param is_clear True when a clear is being executed
-/// @param regs 3D registers
-/// @return True when the contents have to be preserved
-bool HasToPreserveColorContents(bool is_clear, const Maxwell& regs) {
-    if (!is_clear) {
-        return true;
-    }
-    // First we have to make sure all clear masks are enabled.
-    if (!regs.clear_buffers.R || !regs.clear_buffers.G || !regs.clear_buffers.B ||
-        !regs.clear_buffers.A) {
-        return true;
-    }
-    // If scissors are disabled, the whole screen is cleared
-    if (!regs.clear_flags.scissor) {
-        return false;
+        const u32 raw = engine.AccessConstBuffer32(shader_type, entry.buffer, entry.offset);
+        return TextureHandle(raw, via_header_index);
     }
-    // Then we have to confirm scissor testing clears the whole image
-    const std::size_t index = regs.clear_buffers.RT;
-    const auto& scissor = regs.scissor_test[0];
-    return scissor.min_x > 0 || scissor.min_y > 0 || scissor.max_x < regs.rt[index].width ||
-           scissor.max_y < regs.rt[index].height;
+    const u32 buffer = engine.GetBoundBuffer();
+    const u64 offset = (entry.offset + index) * sizeof(u32);
+    return TextureHandle(engine.AccessConstBuffer32(shader_type, buffer, offset), via_header_index);
 }
 
-/// @brief Determine if an attachment to be updated has to preserve contents
-/// @param is_clear True when a clear is being executed
-/// @param regs 3D registers
-/// @return True when the contents have to be preserved
-bool HasToPreserveDepthContents(bool is_clear, const Maxwell& regs) {
-    // If we are not clearing, the contents have to be preserved
-    if (!is_clear) {
-        return true;
-    }
-    // For depth stencil clears we only have to confirm scissor test covers the whole image
-    if (!regs.clear_flags.scissor) {
-        return false;
-    }
-    // Make sure the clear cover the whole image
-    const auto& scissor = regs.scissor_test[0];
-    return scissor.min_x > 0 || scissor.min_y > 0 || scissor.max_x < regs.zeta_width ||
-           scissor.max_y < regs.zeta_height;
-}
-
-template <std::size_t N>
+template <size_t N>
 std::array<VkDeviceSize, N> ExpandStrides(const std::array<u16, N>& strides) {
     std::array<VkDeviceSize, N> expanded;
     std::copy(strides.begin(), strides.end(), expanded.begin());
     return expanded;
 }
 
+ImageViewType ImageViewTypeFromEntry(const SamplerEntry& entry) {
+    if (entry.is_buffer) {
+        return ImageViewType::e2D;
+    }
+    switch (entry.type) {
+    case Tegra::Shader::TextureType::Texture1D:
+        return entry.is_array ? ImageViewType::e1DArray : ImageViewType::e1D;
+    case Tegra::Shader::TextureType::Texture2D:
+        return entry.is_array ? ImageViewType::e2DArray : ImageViewType::e2D;
+    case Tegra::Shader::TextureType::Texture3D:
+        return ImageViewType::e3D;
+    case Tegra::Shader::TextureType::TextureCube:
+        return entry.is_array ? ImageViewType::CubeArray : ImageViewType::Cube;
+    }
+    UNREACHABLE();
+    return ImageViewType::e2D;
+}
+
+ImageViewType ImageViewTypeFromEntry(const ImageEntry& entry) {
+    switch (entry.type) {
+    case Tegra::Shader::ImageType::Texture1D:
+        return ImageViewType::e1D;
+    case Tegra::Shader::ImageType::Texture1DArray:
+        return ImageViewType::e1DArray;
+    case Tegra::Shader::ImageType::Texture2D:
+        return ImageViewType::e2D;
+    case Tegra::Shader::ImageType::Texture2DArray:
+        return ImageViewType::e2DArray;
+    case Tegra::Shader::ImageType::Texture3D:
+        return ImageViewType::e3D;
+    case Tegra::Shader::ImageType::TextureBuffer:
+        return ImageViewType::Buffer;
+    }
+    UNREACHABLE();
+    return ImageViewType::e2D;
+}
+
+void PushImageDescriptors(const ShaderEntries& entries, TextureCache& texture_cache,
+                          VKUpdateDescriptorQueue& update_descriptor_queue,
+                          ImageViewId*& image_view_id_ptr, VkSampler*& sampler_ptr) {
+    for ([[maybe_unused]] const auto& entry : entries.uniform_texels) {
+        const ImageViewId image_view_id = *image_view_id_ptr++;
+        const ImageView& image_view = texture_cache.GetImageView(image_view_id);
+        update_descriptor_queue.AddTexelBuffer(image_view.BufferView());
+    }
+    for (const auto& entry : entries.samplers) {
+        for (size_t i = 0; i < entry.size; ++i) {
+            const VkSampler sampler = *sampler_ptr++;
+            const ImageViewId image_view_id = *image_view_id_ptr++;
+            const ImageView& image_view = texture_cache.GetImageView(image_view_id);
+            const VkImageView handle = image_view.Handle(ImageViewTypeFromEntry(entry));
+            update_descriptor_queue.AddSampledImage(handle, sampler);
+        }
+    }
+    for ([[maybe_unused]] const auto& entry : entries.storage_texels) {
+        const ImageViewId image_view_id = *image_view_id_ptr++;
+        const ImageView& image_view = texture_cache.GetImageView(image_view_id);
+        update_descriptor_queue.AddTexelBuffer(image_view.BufferView());
+    }
+    for (const auto& entry : entries.images) {
+        // TODO: Mark as modified
+        const ImageViewId image_view_id = *image_view_id_ptr++;
+        const ImageView& image_view = texture_cache.GetImageView(image_view_id);
+        const VkImageView handle = image_view.Handle(ImageViewTypeFromEntry(entry));
+        update_descriptor_queue.AddImage(handle);
+    }
+}
+
 } // Anonymous namespace
 
 class BufferBindings final {
@@ -290,7 +316,7 @@ public:
 private:
     // Some of these fields are intentionally left uninitialized to avoid initializing them twice.
     struct {
-        std::size_t num_buffers = 0;
+        size_t num_buffers = 0;
         std::array<VkBuffer, Maxwell::NumVertexArrays> buffers;
         std::array<VkDeviceSize, Maxwell::NumVertexArrays> offsets;
         std::array<VkDeviceSize, Maxwell::NumVertexArrays> sizes;
@@ -303,7 +329,7 @@ private:
         VkIndexType type;
     } index;
 
-    template <std::size_t N>
+    template <size_t N>
     void BindStatic(const VKDevice& device, VKScheduler& scheduler) const {
         if (device.IsExtExtendedDynamicStateSupported()) {
             if (index.buffer) {
@@ -320,7 +346,7 @@ private:
         }
     }
 
-    template <std::size_t N, bool is_indexed, bool has_extended_dynamic_state>
+    template <size_t N, bool is_indexed, bool has_extended_dynamic_state>
     void BindStatic(VKScheduler& scheduler) const {
         static_assert(N <= Maxwell::NumVertexArrays);
         if constexpr (N == 0) {
@@ -385,20 +411,23 @@ RasterizerVulkan::RasterizerVulkan(Core::Frontend::EmuWindow& emu_window_, Tegra
                                    Core::Memory::Memory& cpu_memory_, VKScreenInfo& screen_info_,
                                    const VKDevice& device_, VKMemoryManager& memory_manager_,
                                    StateTracker& state_tracker_, VKScheduler& scheduler_)
-    : RasterizerAccelerated(cpu_memory_), gpu(gpu_), gpu_memory(gpu_memory_),
-      maxwell3d(gpu.Maxwell3D()), kepler_compute(gpu.KeplerCompute()), screen_info(screen_info_),
-      device(device_), memory_manager(memory_manager_), state_tracker(state_tracker_),
-      scheduler(scheduler_), staging_pool(device, memory_manager, scheduler),
-      descriptor_pool(device, scheduler_), update_descriptor_queue(device, scheduler),
-      renderpass_cache(device),
+    : RasterizerAccelerated{cpu_memory_}, gpu{gpu_},
+      gpu_memory{gpu_memory_}, maxwell3d{gpu.Maxwell3D()}, kepler_compute{gpu.KeplerCompute()},
+      screen_info{screen_info_}, device{device_}, memory_manager{memory_manager_},
+      state_tracker{state_tracker_}, scheduler{scheduler_}, stream_buffer(device, scheduler),
+      staging_pool(device, memory_manager, scheduler), descriptor_pool(device, scheduler),
+      update_descriptor_queue(device, scheduler),
+      blit_image(device, scheduler, state_tracker, descriptor_pool),
       quad_array_pass(device, scheduler, descriptor_pool, staging_pool, update_descriptor_queue),
       quad_indexed_pass(device, scheduler, descriptor_pool, staging_pool, update_descriptor_queue),
       uint8_pass(device, scheduler, descriptor_pool, staging_pool, update_descriptor_queue),
-      texture_cache(*this, maxwell3d, gpu_memory, device, memory_manager, scheduler, staging_pool),
+      texture_cache_runtime{device, scheduler, memory_manager, staging_pool, blit_image},
+      texture_cache(texture_cache_runtime, *this, maxwell3d, kepler_compute, gpu_memory),
       pipeline_cache(*this, gpu, maxwell3d, kepler_compute, gpu_memory, device, scheduler,
-                     descriptor_pool, update_descriptor_queue, renderpass_cache),
-      buffer_cache(*this, gpu_memory, cpu_memory_, device, memory_manager, scheduler, staging_pool),
-      sampler_cache(device), query_cache(*this, maxwell3d, gpu_memory, device, scheduler),
+                     descriptor_pool, update_descriptor_queue),
+      buffer_cache(*this, gpu_memory, cpu_memory_, device, memory_manager, scheduler, stream_buffer,
+                   staging_pool),
+      query_cache{*this, maxwell3d, gpu_memory, device, scheduler},
       fence_manager(*this, gpu, gpu_memory, texture_cache, buffer_cache, query_cache, device,
                     scheduler),
       wfi_event(device.GetLogical().CreateEvent()), async_shaders(emu_window_) {
@@ -427,9 +456,10 @@ void RasterizerVulkan::Draw(bool is_indexed, bool is_instanced) {
     const DrawParameters draw_params =
         SetupGeometry(key.fixed_state, buffer_bindings, is_indexed, is_instanced);
 
-    update_descriptor_queue.Acquire();
-    sampled_views.clear();
-    image_views.clear();
+    auto lock = texture_cache.AcquireLock();
+    texture_cache.SynchronizeGraphicsDescriptors();
+
+    texture_cache.UpdateRenderTargets(false);
 
     const auto shaders = pipeline_cache.GetShaders();
     key.shaders = GetShaderAddresses(shaders);
@@ -437,30 +467,24 @@ void RasterizerVulkan::Draw(bool is_indexed, bool is_instanced) {
 
     buffer_cache.Unmap();
 
-    const Texceptions texceptions = UpdateAttachments(false);
-    SetupImageTransitions(texceptions, color_attachments, zeta_attachment);
-
-    key.renderpass_params = GetRenderPassParams(texceptions);
-    key.padding = 0;
+    const Framebuffer* const framebuffer = texture_cache.GetFramebuffer();
+    key.renderpass = framebuffer->RenderPass();
 
-    auto* pipeline = pipeline_cache.GetGraphicsPipeline(key, async_shaders);
+    auto* const pipeline =
+        pipeline_cache.GetGraphicsPipeline(key, framebuffer->NumColorBuffers(), async_shaders);
     if (pipeline == nullptr || pipeline->GetHandle() == VK_NULL_HANDLE) {
         // Async graphics pipeline was not ready.
         return;
     }
 
-    scheduler.BindGraphicsPipeline(pipeline->GetHandle());
-
-    const auto renderpass = pipeline->GetRenderPass();
-    const auto [framebuffer, render_area] = ConfigureFramebuffers(renderpass);
-    scheduler.RequestRenderpass(renderpass, framebuffer, render_area);
-
-    UpdateDynamicStates();
-
     buffer_bindings.Bind(device, scheduler);
 
     BeginTransformFeedback();
 
+    scheduler.RequestRenderpass(framebuffer);
+    scheduler.BindGraphicsPipeline(pipeline->GetHandle());
+    UpdateDynamicStates();
+
     const auto pipeline_layout = pipeline->GetLayout();
     const auto descriptor_set = pipeline->CommitDescriptorSet();
     scheduler.Record([pipeline_layout, descriptor_set, draw_params](vk::CommandBuffer cmdbuf) {
@@ -481,9 +505,6 @@ void RasterizerVulkan::Clear() {
         return;
     }
 
-    sampled_views.clear();
-    image_views.clear();
-
     query_cache.UpdateCounters();
 
     const auto& regs = maxwell3d.regs;
@@ -495,20 +516,24 @@ void RasterizerVulkan::Clear() {
         return;
     }
 
-    [[maybe_unused]] const auto texceptions = UpdateAttachments(true);
-    DEBUG_ASSERT(texceptions.none());
-    SetupImageTransitions(0, color_attachments, zeta_attachment);
+    auto lock = texture_cache.AcquireLock();
+    texture_cache.UpdateRenderTargets(true);
+    const Framebuffer* const framebuffer = texture_cache.GetFramebuffer();
+    const VkExtent2D render_area = framebuffer->RenderArea();
+    scheduler.RequestRenderpass(framebuffer);
 
-    const VkRenderPass renderpass = renderpass_cache.GetRenderPass(GetRenderPassParams(0));
-    const auto [framebuffer, render_area] = ConfigureFramebuffers(renderpass);
-    scheduler.RequestRenderpass(renderpass, framebuffer, render_area);
-
-    VkClearRect clear_rect;
-    clear_rect.baseArrayLayer = regs.clear_buffers.layer;
-    clear_rect.layerCount = 1;
-    clear_rect.rect = GetScissorState(regs, 0);
-    clear_rect.rect.extent.width = std::min(clear_rect.rect.extent.width, render_area.width);
-    clear_rect.rect.extent.height = std::min(clear_rect.rect.extent.height, render_area.height);
+    VkClearRect clear_rect{
+        .rect = GetScissorState(regs, 0),
+        .baseArrayLayer = regs.clear_buffers.layer,
+        .layerCount = 1,
+    };
+    if (clear_rect.rect.extent.width == 0 || clear_rect.rect.extent.height == 0) {
+        return;
+    }
+    clear_rect.rect.extent = VkExtent2D{
+        .width = std::min(clear_rect.rect.extent.width, render_area.width),
+        .height = std::min(clear_rect.rect.extent.height, render_area.height),
+    };
 
     if (use_color) {
         VkClearValue clear_value;
@@ -549,9 +574,6 @@ void RasterizerVulkan::Clear() {
 
 void RasterizerVulkan::DispatchCompute(GPUVAddr code_addr) {
     MICROPROFILE_SCOPE(Vulkan_Compute);
-    update_descriptor_queue.Acquire();
-    sampled_views.clear();
-    image_views.clear();
 
     query_cache.UpdateCounters();
 
@@ -570,29 +592,43 @@ void RasterizerVulkan::DispatchCompute(GPUVAddr code_addr) {
     // Compute dispatches can't be executed inside a renderpass
     scheduler.RequestOutsideRenderPassOperationContext();
 
-    buffer_cache.Map(CalculateComputeStreamBufferSize());
+    image_view_indices.clear();
+    sampler_handles.clear();
+
+    auto lock = texture_cache.AcquireLock();
+    texture_cache.SynchronizeComputeDescriptors();
 
     const auto& entries = pipeline.GetEntries();
-    SetupComputeConstBuffers(entries);
-    SetupComputeGlobalBuffers(entries);
     SetupComputeUniformTexels(entries);
     SetupComputeTextures(entries);
     SetupComputeStorageTexels(entries);
     SetupComputeImages(entries);
 
-    buffer_cache.Unmap();
+    const std::span indices_span(image_view_indices.data(), image_view_indices.size());
+    texture_cache.FillComputeImageViews(indices_span, image_view_ids);
 
-    TransitionImages(sampled_views, VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT,
-                     VK_ACCESS_SHADER_READ_BIT);
-    TransitionImages(image_views, VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT,
-                     VK_ACCESS_SHADER_READ_BIT | VK_ACCESS_SHADER_WRITE_BIT);
+    buffer_cache.Map(CalculateComputeStreamBufferSize());
 
+    update_descriptor_queue.Acquire();
+
+    SetupComputeConstBuffers(entries);
+    SetupComputeGlobalBuffers(entries);
+
+    ImageViewId* image_view_id_ptr = image_view_ids.data();
+    VkSampler* sampler_ptr = sampler_handles.data();
+    PushImageDescriptors(entries, texture_cache, update_descriptor_queue, image_view_id_ptr,
+                         sampler_ptr);
+
+    buffer_cache.Unmap();
+
+    const VkPipeline pipeline_handle = pipeline.GetHandle();
+    const VkPipelineLayout pipeline_layout = pipeline.GetLayout();
+    const VkDescriptorSet descriptor_set = pipeline.CommitDescriptorSet();
     scheduler.Record([grid_x = launch_desc.grid_dim_x, grid_y = launch_desc.grid_dim_y,
-                      grid_z = launch_desc.grid_dim_z, pipeline_handle = pipeline.GetHandle(),
-                      layout = pipeline.GetLayout(),
-                      descriptor_set = pipeline.CommitDescriptorSet()](vk::CommandBuffer cmdbuf) {
+                      grid_z = launch_desc.grid_dim_z, pipeline_handle, pipeline_layout,
+                      descriptor_set](vk::CommandBuffer cmdbuf) {
         cmdbuf.BindPipeline(VK_PIPELINE_BIND_POINT_COMPUTE, pipeline_handle);
-        cmdbuf.BindDescriptorSets(VK_PIPELINE_BIND_POINT_COMPUTE, layout, DESCRIPTOR_SET,
+        cmdbuf.BindDescriptorSets(VK_PIPELINE_BIND_POINT_COMPUTE, pipeline_layout, DESCRIPTOR_SET,
                                   descriptor_set, {});
         cmdbuf.Dispatch(grid_x, grid_y, grid_z);
     });
@@ -613,7 +649,10 @@ void RasterizerVulkan::FlushRegion(VAddr addr, u64 size) {
     if (addr == 0 || size == 0) {
         return;
     }
-    texture_cache.FlushRegion(addr, size);
+    {
+        auto lock = texture_cache.AcquireLock();
+        texture_cache.DownloadMemory(addr, size);
+    }
     buffer_cache.FlushRegion(addr, size);
     query_cache.FlushRegion(addr, size);
 }
@@ -622,14 +661,18 @@ bool RasterizerVulkan::MustFlushRegion(VAddr addr, u64 size) {
     if (!Settings::IsGPULevelHigh()) {
         return buffer_cache.MustFlushRegion(addr, size);
     }
-    return texture_cache.MustFlushRegion(addr, size) || buffer_cache.MustFlushRegion(addr, size);
+    return texture_cache.IsRegionGpuModified(addr, size) ||
+           buffer_cache.MustFlushRegion(addr, size);
 }
 
 void RasterizerVulkan::InvalidateRegion(VAddr addr, u64 size) {
     if (addr == 0 || size == 0) {
         return;
     }
-    texture_cache.InvalidateRegion(addr, size);
+    {
+        auto lock = texture_cache.AcquireLock();
+        texture_cache.WriteMemory(addr, size);
+    }
     pipeline_cache.InvalidateRegion(addr, size);
     buffer_cache.InvalidateRegion(addr, size);
     query_cache.InvalidateRegion(addr, size);
@@ -639,17 +682,28 @@ void RasterizerVulkan::OnCPUWrite(VAddr addr, u64 size) {
     if (addr == 0 || size == 0) {
         return;
     }
-    texture_cache.OnCPUWrite(addr, size);
+    {
+        auto lock = texture_cache.AcquireLock();
+        texture_cache.WriteMemory(addr, size);
+    }
     pipeline_cache.OnCPUWrite(addr, size);
     buffer_cache.OnCPUWrite(addr, size);
 }
 
 void RasterizerVulkan::SyncGuestHost() {
-    texture_cache.SyncGuestHost();
     buffer_cache.SyncGuestHost();
     pipeline_cache.SyncGuestHost();
 }
 
+void RasterizerVulkan::UnmapMemory(VAddr addr, u64 size) {
+    {
+        auto lock = texture_cache.AcquireLock();
+        texture_cache.UnmapMemory(addr, size);
+    }
+    buffer_cache.OnCPUWrite(addr, size);
+    pipeline_cache.OnCPUWrite(addr, size);
+}
+
 void RasterizerVulkan::SignalSemaphore(GPUVAddr addr, u32 value) {
     if (!gpu.IsAsync()) {
         gpu_memory.Write<u32>(addr, value);
@@ -700,6 +754,14 @@ void RasterizerVulkan::WaitForIdle() {
     });
 }
 
+void RasterizerVulkan::FragmentBarrier() {
+    // We already put barriers when a render pass finishes
+}
+
+void RasterizerVulkan::TiledCacheBarrier() {
+    // TODO: Implementing tiled barriers requires rewriting a good chunk of the Vulkan backend
+}
+
 void RasterizerVulkan::FlushCommands() {
     if (draw_counter > 0) {
         draw_counter = 0;
@@ -710,14 +772,20 @@ void RasterizerVulkan::FlushCommands() {
 void RasterizerVulkan::TickFrame() {
     draw_counter = 0;
     update_descriptor_queue.TickFrame();
+    fence_manager.TickFrame();
     buffer_cache.TickFrame();
     staging_pool.TickFrame();
+    {
+        auto lock = texture_cache.AcquireLock();
+        texture_cache.TickFrame();
+    }
 }
 
-bool RasterizerVulkan::AccelerateSurfaceCopy(const Tegra::Engines::Fermi2D::Regs::Surface& src,
-                                             const Tegra::Engines::Fermi2D::Regs::Surface& dst,
+bool RasterizerVulkan::AccelerateSurfaceCopy(const Tegra::Engines::Fermi2D::Surface& src,
+                                             const Tegra::Engines::Fermi2D::Surface& dst,
                                              const Tegra::Engines::Fermi2D::Config& copy_config) {
-    texture_cache.DoFermiCopy(src, dst, copy_config);
+    auto lock = texture_cache.AcquireLock();
+    texture_cache.BlitImage(dst, src, copy_config);
     return true;
 }
 
@@ -727,20 +795,16 @@ bool RasterizerVulkan::AccelerateDisplay(const Tegra::FramebufferConfig& config,
         return false;
     }
 
-    const auto surface{texture_cache.TryFindFramebufferSurface(framebuffer_addr)};
-    if (!surface) {
+    auto lock = texture_cache.AcquireLock();
+    ImageView* const image_view = texture_cache.TryFindFramebufferImageView(framebuffer_addr);
+    if (!image_view) {
         return false;
     }
 
-    // Verify that the cached surface is the same size and format as the requested framebuffer
-    const auto& params{surface->GetSurfaceParams()};
-    ASSERT_MSG(params.width == config.width, "Framebuffer width is different");
-    ASSERT_MSG(params.height == config.height, "Framebuffer height is different");
-
-    screen_info.image = &surface->GetImage();
-    screen_info.width = params.width;
-    screen_info.height = params.height;
-    screen_info.is_srgb = surface->GetSurfaceParams().srgb_conversion;
+    screen_info.image_view = image_view->Handle(VideoCommon::ImageViewType::e2D);
+    screen_info.width = image_view->size.width;
+    screen_info.height = image_view->size.height;
+    screen_info.is_srgb = VideoCore::Surface::IsPixelFormatSRGB(image_view->format);
     return true;
 }
 
@@ -765,103 +829,6 @@ void RasterizerVulkan::FlushWork() {
     draw_counter = 0;
 }
 
-RasterizerVulkan::Texceptions RasterizerVulkan::UpdateAttachments(bool is_clear) {
-    MICROPROFILE_SCOPE(Vulkan_RenderTargets);
-
-    const auto& regs = maxwell3d.regs;
-    auto& dirty = maxwell3d.dirty.flags;
-    const bool update_rendertargets = dirty[VideoCommon::Dirty::RenderTargets];
-    dirty[VideoCommon::Dirty::RenderTargets] = false;
-
-    texture_cache.GuardRenderTargets(true);
-
-    Texceptions texceptions;
-    for (std::size_t rt = 0; rt < Maxwell::NumRenderTargets; ++rt) {
-        if (update_rendertargets) {
-            const bool preserve_contents = HasToPreserveColorContents(is_clear, regs);
-            color_attachments[rt] = texture_cache.GetColorBufferSurface(rt, preserve_contents);
-        }
-        if (color_attachments[rt] && WalkAttachmentOverlaps(*color_attachments[rt])) {
-            texceptions[rt] = true;
-        }
-    }
-
-    if (update_rendertargets) {
-        const bool preserve_contents = HasToPreserveDepthContents(is_clear, regs);
-        zeta_attachment = texture_cache.GetDepthBufferSurface(preserve_contents);
-    }
-    if (zeta_attachment && WalkAttachmentOverlaps(*zeta_attachment)) {
-        texceptions[ZETA_TEXCEPTION_INDEX] = true;
-    }
-
-    texture_cache.GuardRenderTargets(false);
-
-    return texceptions;
-}
-
-bool RasterizerVulkan::WalkAttachmentOverlaps(const CachedSurfaceView& attachment) {
-    bool overlap = false;
-    for (auto& [view, layout] : sampled_views) {
-        if (!attachment.IsSameSurface(*view)) {
-            continue;
-        }
-        overlap = true;
-        *layout = VK_IMAGE_LAYOUT_GENERAL;
-    }
-    return overlap;
-}
-
-std::tuple<VkFramebuffer, VkExtent2D> RasterizerVulkan::ConfigureFramebuffers(
-    VkRenderPass renderpass) {
-    FramebufferCacheKey key{
-        .renderpass = renderpass,
-        .width = std::numeric_limits<u32>::max(),
-        .height = std::numeric_limits<u32>::max(),
-        .layers = std::numeric_limits<u32>::max(),
-        .views = {},
-    };
-
-    const auto try_push = [&key](const View& view) {
-        if (!view) {
-            return false;
-        }
-        key.views.push_back(view->GetAttachment());
-        key.width = std::min(key.width, view->GetWidth());
-        key.height = std::min(key.height, view->GetHeight());
-        key.layers = std::min(key.layers, view->GetNumLayers());
-        return true;
-    };
-
-    const auto& regs = maxwell3d.regs;
-    const std::size_t num_attachments = static_cast<std::size_t>(regs.rt_control.count);
-    for (std::size_t index = 0; index < num_attachments; ++index) {
-        if (try_push(color_attachments[index])) {
-            texture_cache.MarkColorBufferInUse(index);
-        }
-    }
-    if (try_push(zeta_attachment)) {
-        texture_cache.MarkDepthBufferInUse();
-    }
-
-    const auto [fbentry, is_cache_miss] = framebuffer_cache.try_emplace(key);
-    auto& framebuffer = fbentry->second;
-    if (is_cache_miss) {
-        framebuffer = device.GetLogical().CreateFramebuffer({
-            .sType = VK_STRUCTURE_TYPE_FRAMEBUFFER_CREATE_INFO,
-            .pNext = nullptr,
-            .flags = 0,
-            .renderPass = key.renderpass,
-            .attachmentCount = static_cast<u32>(key.views.size()),
-            .pAttachments = key.views.data(),
-            .width = key.width,
-            .height = key.height,
-            .layers = key.layers,
-        });
-    }
-
-    return {*framebuffer, VkExtent2D{key.width, key.height}};
-}
-
 RasterizerVulkan::DrawParameters RasterizerVulkan::SetupGeometry(FixedPipelineState& fixed_state,
                                                                  BufferBindings& buffer_bindings,
                                                                  bool is_indexed,
@@ -885,50 +852,37 @@ RasterizerVulkan::DrawParameters RasterizerVulkan::SetupGeometry(FixedPipelineSt
 
 void RasterizerVulkan::SetupShaderDescriptors(
     const std::array<Shader*, Maxwell::MaxShaderProgram>& shaders) {
-    texture_cache.GuardSamplers(true);
-
-    for (std::size_t stage = 0; stage < Maxwell::MaxShaderStage; ++stage) {
-        // Skip VertexA stage
+    image_view_indices.clear();
+    sampler_handles.clear();
+    for (size_t stage = 0; stage < Maxwell::MaxShaderStage; ++stage) {
         Shader* const shader = shaders[stage + 1];
         if (!shader) {
             continue;
         }
         const auto& entries = shader->GetEntries();
-        SetupGraphicsConstBuffers(entries, stage);
-        SetupGraphicsGlobalBuffers(entries, stage);
         SetupGraphicsUniformTexels(entries, stage);
         SetupGraphicsTextures(entries, stage);
         SetupGraphicsStorageTexels(entries, stage);
         SetupGraphicsImages(entries, stage);
     }
-    texture_cache.GuardSamplers(false);
-}
+    const std::span indices_span(image_view_indices.data(), image_view_indices.size());
+    texture_cache.FillGraphicsImageViews(indices_span, image_view_ids);
 
-void RasterizerVulkan::SetupImageTransitions(Texceptions texceptions, const ColorAttachments& color,
-                                             const ZetaAttachment& zeta) {
-    TransitionImages(sampled_views, VK_PIPELINE_STAGE_ALL_GRAPHICS_BIT, VK_ACCESS_SHADER_READ_BIT);
-    TransitionImages(image_views, VK_PIPELINE_STAGE_ALL_GRAPHICS_BIT,
-                     VK_ACCESS_SHADER_READ_BIT | VK_ACCESS_SHADER_WRITE_BIT);
+    update_descriptor_queue.Acquire();
 
-    for (std::size_t rt = 0; rt < color.size(); ++rt) {
-        const auto color_attachment = color[rt];
-        if (color_attachment == nullptr) {
+    ImageViewId* image_view_id_ptr = image_view_ids.data();
+    VkSampler* sampler_ptr = sampler_handles.data();
+    for (size_t stage = 0; stage < Maxwell::MaxShaderStage; ++stage) {
+        // Skip VertexA stage
+        Shader* const shader = shaders[stage + 1];
+        if (!shader) {
             continue;
         }
-        const auto image_layout =
-            texceptions[rt] ? VK_IMAGE_LAYOUT_GENERAL : VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL;
-        color_attachment->Transition(image_layout, VK_PIPELINE_STAGE_COLOR_ATTACHMENT_OUTPUT_BIT,
-                                     VK_ACCESS_COLOR_ATTACHMENT_READ_BIT |
-                                         VK_ACCESS_COLOR_ATTACHMENT_WRITE_BIT);
-    }
-
-    if (zeta != nullptr) {
-        const auto image_layout = texceptions[ZETA_TEXCEPTION_INDEX]
-                                      ? VK_IMAGE_LAYOUT_GENERAL
-                                      : VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL;
-        zeta->Transition(image_layout, VK_PIPELINE_STAGE_LATE_FRAGMENT_TESTS_BIT,
-                         VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_READ_BIT |
-                             VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT);
+        const auto& entries = shader->GetEntries();
+        SetupGraphicsConstBuffers(entries, stage);
+        SetupGraphicsGlobalBuffers(entries, stage);
+        PushImageDescriptors(entries, texture_cache, update_descriptor_queue, image_view_id_ptr,
+                             sampler_ptr);
     }
 }
 
@@ -1000,7 +954,7 @@ void RasterizerVulkan::EndTransformFeedback() {
 void RasterizerVulkan::SetupVertexArrays(BufferBindings& buffer_bindings) {
     const auto& regs = maxwell3d.regs;
 
-    for (std::size_t index = 0; index < Maxwell::NumVertexArrays; ++index) {
+    for (size_t index = 0; index < Maxwell::NumVertexArrays; ++index) {
         const auto& vertex_array = regs.vertex_array[index];
         if (!vertex_array.IsEnabled()) {
             continue;
@@ -1009,7 +963,7 @@ void RasterizerVulkan::SetupVertexArrays(BufferBindings& buffer_bindings) {
         const GPUVAddr end{regs.vertex_array_limit[index].LimitAddress()};
 
         ASSERT(end >= start);
-        const std::size_t size = end - start;
+        const size_t size = end - start;
         if (size == 0) {
             buffer_bindings.AddVertexBinding(DefaultBuffer(), 0, DEFAULT_BUFFER_SIZE, 0);
             continue;
@@ -1070,7 +1024,7 @@ void RasterizerVulkan::SetupIndexBuffer(BufferBindings& buffer_bindings, DrawPar
     }
 }
 
-void RasterizerVulkan::SetupGraphicsConstBuffers(const ShaderEntries& entries, std::size_t stage) {
+void RasterizerVulkan::SetupGraphicsConstBuffers(const ShaderEntries& entries, size_t stage) {
     MICROPROFILE_SCOPE(Vulkan_ConstBuffers);
     const auto& shader_stage = maxwell3d.state.shader_stages[stage];
     for (const auto& entry : entries.const_buffers) {
@@ -1078,7 +1032,7 @@ void RasterizerVulkan::SetupGraphicsConstBuffers(const ShaderEntries& entries, s
     }
 }
 
-void RasterizerVulkan::SetupGraphicsGlobalBuffers(const ShaderEntries& entries, std::size_t stage) {
+void RasterizerVulkan::SetupGraphicsGlobalBuffers(const ShaderEntries& entries, size_t stage) {
     MICROPROFILE_SCOPE(Vulkan_GlobalBuffers);
     const auto& cbufs{maxwell3d.state.shader_stages[stage]};
 
@@ -1088,37 +1042,49 @@ void RasterizerVulkan::SetupGraphicsGlobalBuffers(const ShaderEntries& entries,
     }
 }
 
-void RasterizerVulkan::SetupGraphicsUniformTexels(const ShaderEntries& entries, std::size_t stage) {
+void RasterizerVulkan::SetupGraphicsUniformTexels(const ShaderEntries& entries, size_t stage) {
     MICROPROFILE_SCOPE(Vulkan_Textures);
+    const auto& regs = maxwell3d.regs;
+    const bool via_header_index = regs.sampler_index == Maxwell::SamplerIndex::ViaHeaderIndex;
     for (const auto& entry : entries.uniform_texels) {
-        const auto image = GetTextureInfo(maxwell3d, entry, stage).tic;
-        SetupUniformTexels(image, entry);
+        const TextureHandle handle = GetTextureInfo(maxwell3d, via_header_index, entry, stage);
+        image_view_indices.push_back(handle.image);
     }
 }
 
-void RasterizerVulkan::SetupGraphicsTextures(const ShaderEntries& entries, std::size_t stage) {
+void RasterizerVulkan::SetupGraphicsTextures(const ShaderEntries& entries, size_t stage) {
     MICROPROFILE_SCOPE(Vulkan_Textures);
+    const auto& regs = maxwell3d.regs;
+    const bool via_header_index = regs.sampler_index == Maxwell::SamplerIndex::ViaHeaderIndex;
     for (const auto& entry : entries.samplers) {
-        for (std::size_t i = 0; i < entry.size; ++i) {
-            const auto texture = GetTextureInfo(maxwell3d, entry, stage, i);
-            SetupTexture(texture, entry);
+        for (size_t index = 0; index < entry.size; ++index) {
+            const TextureHandle handle =
+                GetTextureInfo(maxwell3d, via_header_index, entry, stage, index);
+            image_view_indices.push_back(handle.image);
+
+            Sampler* const sampler = texture_cache.GetGraphicsSampler(handle.sampler);
+            sampler_handles.push_back(sampler->Handle());
         }
     }
 }
 
-void RasterizerVulkan::SetupGraphicsStorageTexels(const ShaderEntries& entries, std::size_t stage) {
+void RasterizerVulkan::SetupGraphicsStorageTexels(const ShaderEntries& entries, size_t stage) {
     MICROPROFILE_SCOPE(Vulkan_Textures);
+    const auto& regs = maxwell3d.regs;
+    const bool via_header_index = regs.sampler_index == Maxwell::SamplerIndex::ViaHeaderIndex;
     for (const auto& entry : entries.storage_texels) {
-        const auto image = GetTextureInfo(maxwell3d, entry, stage).tic;
-        SetupStorageTexel(image, entry);
+        const TextureHandle handle = GetTextureInfo(maxwell3d, via_header_index, entry, stage);
+        image_view_indices.push_back(handle.image);
     }
 }
 
-void RasterizerVulkan::SetupGraphicsImages(const ShaderEntries& entries, std::size_t stage) {
+void RasterizerVulkan::SetupGraphicsImages(const ShaderEntries& entries, size_t stage) {
     MICROPROFILE_SCOPE(Vulkan_Images);
+    const auto& regs = maxwell3d.regs;
+    const bool via_header_index = regs.sampler_index == Maxwell::SamplerIndex::ViaHeaderIndex;
     for (const auto& entry : entries.images) {
-        const auto tic = GetTextureInfo(maxwell3d, entry, stage).tic;
-        SetupImage(tic, entry);
+        const TextureHandle handle = GetTextureInfo(maxwell3d, via_header_index, entry, stage);
+        image_view_indices.push_back(handle.image);
     }
 }
 
@@ -1128,11 +1094,12 @@ void RasterizerVulkan::SetupComputeConstBuffers(const ShaderEntries& entries) {
     for (const auto& entry : entries.const_buffers) {
         const auto& config = launch_desc.const_buffer_config[entry.GetIndex()];
         const std::bitset<8> mask = launch_desc.const_buffer_enable_mask.Value();
-        Tegra::Engines::ConstBufferInfo buffer;
-        buffer.address = config.Address();
-        buffer.size = config.size;
-        buffer.enabled = mask[entry.GetIndex()];
-        SetupConstBuffer(entry, buffer);
+        const Tegra::Engines::ConstBufferInfo info{
+            .address = config.Address(),
+            .size = config.size,
+            .enabled = mask[entry.GetIndex()],
+        };
+        SetupConstBuffer(entry, info);
     }
 }
 
@@ -1147,35 +1114,46 @@ void RasterizerVulkan::SetupComputeGlobalBuffers(const ShaderEntries& entries) {
 
 void RasterizerVulkan::SetupComputeUniformTexels(const ShaderEntries& entries) {
     MICROPROFILE_SCOPE(Vulkan_Textures);
+    const bool via_header_index = kepler_compute.launch_description.linked_tsc;
     for (const auto& entry : entries.uniform_texels) {
-        const auto image = GetTextureInfo(kepler_compute, entry, ComputeShaderIndex).tic;
-        SetupUniformTexels(image, entry);
+        const TextureHandle handle =
+            GetTextureInfo(kepler_compute, via_header_index, entry, COMPUTE_SHADER_INDEX);
+        image_view_indices.push_back(handle.image);
     }
 }
 
 void RasterizerVulkan::SetupComputeTextures(const ShaderEntries& entries) {
     MICROPROFILE_SCOPE(Vulkan_Textures);
+    const bool via_header_index = kepler_compute.launch_description.linked_tsc;
     for (const auto& entry : entries.samplers) {
-        for (std::size_t i = 0; i < entry.size; ++i) {
-            const auto texture = GetTextureInfo(kepler_compute, entry, ComputeShaderIndex, i);
-            SetupTexture(texture, entry);
+        for (size_t index = 0; index < entry.size; ++index) {
+            const TextureHandle handle = GetTextureInfo(kepler_compute, via_header_index, entry,
+                                                        COMPUTE_SHADER_INDEX, index);
+            image_view_indices.push_back(handle.image);
+
+            Sampler* const sampler = texture_cache.GetComputeSampler(handle.sampler);
+            sampler_handles.push_back(sampler->Handle());
         }
     }
 }
 
 void RasterizerVulkan::SetupComputeStorageTexels(const ShaderEntries& entries) {
     MICROPROFILE_SCOPE(Vulkan_Textures);
+    const bool via_header_index = kepler_compute.launch_description.linked_tsc;
     for (const auto& entry : entries.storage_texels) {
-        const auto image = GetTextureInfo(kepler_compute, entry, ComputeShaderIndex).tic;
-        SetupStorageTexel(image, entry);
+        const TextureHandle handle =
+            GetTextureInfo(kepler_compute, via_header_index, entry, COMPUTE_SHADER_INDEX);
+        image_view_indices.push_back(handle.image);
     }
 }
 
 void RasterizerVulkan::SetupComputeImages(const ShaderEntries& entries) {
     MICROPROFILE_SCOPE(Vulkan_Images);
+    const bool via_header_index = kepler_compute.launch_description.linked_tsc;
     for (const auto& entry : entries.images) {
-        const auto tic = GetTextureInfo(kepler_compute, entry, ComputeShaderIndex).tic;
-        SetupImage(tic, entry);
+        const TextureHandle handle =
+            GetTextureInfo(kepler_compute, via_header_index, entry, COMPUTE_SHADER_INDEX);
+        image_view_indices.push_back(handle.image);
     }
 }
 
@@ -1186,14 +1164,12 @@ void RasterizerVulkan::SetupConstBuffer(const ConstBufferEntry& entry,
         update_descriptor_queue.AddBuffer(DefaultBuffer(), 0, DEFAULT_BUFFER_SIZE);
         return;
     }
-
     // Align the size to avoid bad std140 interactions
-    const std::size_t size =
-        Common::AlignUp(CalculateConstBufferSize(entry, buffer), 4 * sizeof(float));
+    const size_t size = Common::AlignUp(CalculateConstBufferSize(entry, buffer), 4 * sizeof(float));
     ASSERT(size <= MaxConstbufferSize);
 
-    const auto info =
-        buffer_cache.UploadMemory(buffer.address, size, device.GetUniformBufferAlignment());
+    const u64 alignment = device.GetUniformBufferAlignment();
+    const auto info = buffer_cache.UploadMemory(buffer.address, size, alignment);
     update_descriptor_queue.AddBuffer(info.handle, info.offset, size);
 }
 
@@ -1206,7 +1182,7 @@ void RasterizerVulkan::SetupGlobalBuffer(const GlobalBufferEntry& entry, GPUVAdd
         // because Vulkan doesn't like empty buffers.
         // Note: Do *not* use DefaultBuffer() here, storage buffers can be written breaking the
         // default buffer.
-        static constexpr std::size_t dummy_size = 4;
+        static constexpr size_t dummy_size = 4;
         const auto info = buffer_cache.GetEmptyBuffer(dummy_size);
         update_descriptor_queue.AddBuffer(info.handle, info.offset, dummy_size);
         return;
@@ -1217,55 +1193,6 @@ void RasterizerVulkan::SetupGlobalBuffer(const GlobalBufferEntry& entry, GPUVAdd
     update_descriptor_queue.AddBuffer(info.handle, info.offset, size);
 }
 
-void RasterizerVulkan::SetupUniformTexels(const Tegra::Texture::TICEntry& tic,
-                                          const UniformTexelEntry& entry) {
-    const auto view = texture_cache.GetTextureSurface(tic, entry);
-    ASSERT(view->IsBufferView());
-
-    update_descriptor_queue.AddTexelBuffer(view->GetBufferView());
-}
-
-void RasterizerVulkan::SetupTexture(const Tegra::Texture::FullTextureInfo& texture,
-                                    const SamplerEntry& entry) {
-    auto view = texture_cache.GetTextureSurface(texture.tic, entry);
-    ASSERT(!view->IsBufferView());
-
-    const VkImageView image_view = view->GetImageView(texture.tic.x_source, texture.tic.y_source,
-                                                      texture.tic.z_source, texture.tic.w_source);
-    const auto sampler = sampler_cache.GetSampler(texture.tsc);
-    update_descriptor_queue.AddSampledImage(sampler, image_view);
-
-    VkImageLayout* const image_layout = update_descriptor_queue.LastImageLayout();
-    *image_layout = VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL;
-    sampled_views.push_back(ImageView{std::move(view), image_layout});
-}
-
-void RasterizerVulkan::SetupStorageTexel(const Tegra::Texture::TICEntry& tic,
-                                         const StorageTexelEntry& entry) {
-    const auto view = texture_cache.GetImageSurface(tic, entry);
-    ASSERT(view->IsBufferView());
-
-    update_descriptor_queue.AddTexelBuffer(view->GetBufferView());
-}
-
-void RasterizerVulkan::SetupImage(const Tegra::Texture::TICEntry& tic, const ImageEntry& entry) {
-    auto view = texture_cache.GetImageSurface(tic, entry);
-
-    if (entry.is_written) {
-        view->MarkAsModified(texture_cache.Tick());
-    }
-
-    UNIMPLEMENTED_IF(tic.IsBuffer());
-
-    const VkImageView image_view =
-        view->GetImageView(tic.x_source, tic.y_source, tic.z_source, tic.w_source);
-    update_descriptor_queue.AddImage(image_view);
-
-    VkImageLayout* const image_layout = update_descriptor_queue.LastImageLayout();
-    *image_layout = VK_IMAGE_LAYOUT_GENERAL;
-    image_views.push_back(ImageView{std::move(view), image_layout});
-}
-
 void RasterizerVulkan::UpdateViewportsState(Tegra::Engines::Maxwell3D::Regs& regs) {
     if (!state_tracker.TouchViewports()) {
         return;
@@ -1457,8 +1384,8 @@ void RasterizerVulkan::UpdateStencilTestEnable(Tegra::Engines::Maxwell3D::Regs&
     });
 }
 
-std::size_t RasterizerVulkan::CalculateGraphicsStreamBufferSize(bool is_indexed) const {
-    std::size_t size = CalculateVertexArraysSize();
+size_t RasterizerVulkan::CalculateGraphicsStreamBufferSize(bool is_indexed) const {
+    size_t size = CalculateVertexArraysSize();
     if (is_indexed) {
         size = Common::AlignUp(size, 4) + CalculateIndexBufferSize();
     }
@@ -1466,15 +1393,15 @@ std::size_t RasterizerVulkan::CalculateGraphicsStreamBufferSize(bool is_indexed)
     return size;
 }
 
-std::size_t RasterizerVulkan::CalculateComputeStreamBufferSize() const {
+size_t RasterizerVulkan::CalculateComputeStreamBufferSize() const {
     return Tegra::Engines::KeplerCompute::NumConstBuffers *
            (Maxwell::MaxConstBufferSize + device.GetUniformBufferAlignment());
 }
 
-std::size_t RasterizerVulkan::CalculateVertexArraysSize() const {
+size_t RasterizerVulkan::CalculateVertexArraysSize() const {
     const auto& regs = maxwell3d.regs;
 
-    std::size_t size = 0;
+    size_t size = 0;
     for (u32 index = 0; index < Maxwell::NumVertexArrays; ++index) {
         // This implementation assumes that all attributes are used in the shader.
         const GPUVAddr start{regs.vertex_array[index].StartAddress()};
@@ -1486,12 +1413,12 @@ std::size_t RasterizerVulkan::CalculateVertexArraysSize() const {
     return size;
 }
 
-std::size_t RasterizerVulkan::CalculateIndexBufferSize() const {
-    return static_cast<std::size_t>(maxwell3d.regs.index_array.count) *
-           static_cast<std::size_t>(maxwell3d.regs.index_array.FormatSizeInBytes());
+size_t RasterizerVulkan::CalculateIndexBufferSize() const {
+    return static_cast<size_t>(maxwell3d.regs.index_array.count) *
+           static_cast<size_t>(maxwell3d.regs.index_array.FormatSizeInBytes());
 }
 
-std::size_t RasterizerVulkan::CalculateConstBufferSize(
+size_t RasterizerVulkan::CalculateConstBufferSize(
     const ConstBufferEntry& entry, const Tegra::Engines::ConstBufferInfo& buffer) const {
     if (entry.IsIndirect()) {
         // Buffer is accessed indirectly, so upload the entire thing
@@ -1502,37 +1429,10 @@ std::size_t RasterizerVulkan::CalculateConstBufferSize(
     }
 }
 
-RenderPassParams RasterizerVulkan::GetRenderPassParams(Texceptions texceptions) const {
-    const auto& regs = maxwell3d.regs;
-    const std::size_t num_attachments = static_cast<std::size_t>(regs.rt_control.count);
-
-    RenderPassParams params;
-    params.color_formats = {};
-    std::size_t color_texceptions = 0;
-
-    std::size_t index = 0;
-    for (std::size_t rt = 0; rt < num_attachments; ++rt) {
-        const auto& rendertarget = regs.rt[rt];
-        if (rendertarget.Address() == 0 || rendertarget.format == Tegra::RenderTargetFormat::NONE) {
-            continue;
-        }
-        params.color_formats[index] = static_cast<u8>(rendertarget.format);
-        color_texceptions |= (texceptions[rt] ? 1ULL : 0ULL) << index;
-        ++index;
-    }
-    params.num_color_attachments = static_cast<u8>(index);
-    params.texceptions = static_cast<u8>(color_texceptions);
-
-    params.zeta_format = regs.zeta_enable ? static_cast<u8>(regs.zeta.format) : 0;
-    params.zeta_texception = texceptions[ZETA_TEXCEPTION_INDEX];
-    return params;
-}
-
 VkBuffer RasterizerVulkan::DefaultBuffer() {
     if (default_buffer) {
         return *default_buffer;
     }
-
     default_buffer = device.GetLogical().CreateBuffer({
         .sType = VK_STRUCTURE_TYPE_BUFFER_CREATE_INFO,
         .pNext = nullptr,