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authorYuri Kunde Schlesner <yuriks@yuriks.net>2017-05-16 10:00:37 -0700
committerGitHub <noreply@github.com>2017-05-16 10:00:37 -0700
commit8d558777a6484162b0cffe20b89bb486e88478a3 (patch)
tree0c5578f14ef73a191a5d492118018d6d9bff7389 /src/video_core/regs_framebuffer.h
parent180587bb8bd18feeb81028007556276ef4ecaafd (diff)
parent86ee1f61012efc365eedc43fb856890be14c88cc (diff)
Merge pull request #2703 from wwylele/pica-reg-revise
pica: correct bit field length for some registers
Diffstat (limited to 'src/video_core/regs_framebuffer.h')
-rw-r--r--src/video_core/regs_framebuffer.h7
1 files changed, 4 insertions, 3 deletions
diff --git a/src/video_core/regs_framebuffer.h b/src/video_core/regs_framebuffer.h
index 9ddc79243..a50bd4111 100644
--- a/src/video_core/regs_framebuffer.h
+++ b/src/video_core/regs_framebuffer.h
@@ -211,13 +211,14 @@ struct FramebufferRegs {
BitField<0, 2, u32> allow_depth_stencil_write; // 0 = disable, else enable
};
- DepthFormat depth_format; // TODO: Should be a BitField!
+ BitField<0, 2, DepthFormat> depth_format;
+
BitField<16, 3, ColorFormat> color_format;
INSERT_PADDING_WORDS(0x4);
- u32 depth_buffer_address;
- u32 color_buffer_address;
+ BitField<0, 28, u32> depth_buffer_address;
+ BitField<0, 28, u32> color_buffer_address;
union {
// Apparently, the framebuffer width is stored as expected,