aboutsummaryrefslogtreecommitdiff
path: root/src/video_core/engines
diff options
context:
space:
mode:
authorbunnei <bunneidev@gmail.com>2020-05-03 02:43:18 -0400
committerGitHub <noreply@github.com>2020-05-03 02:43:18 -0400
commit2aff0b473338655fba08f83c6a4c0af808b6d4a9 (patch)
treeaae207eac2560d76f835a0eba3511b36fcf4a571 /src/video_core/engines
parenta925ae79ff848b1f6f784e660ce59744667b50b7 (diff)
parentfe931ac9761a813c8e7d195cf99bf68ff324839c (diff)
Merge pull request #3808 from ReinUsesLisp/wait-for-idle
{maxwell_3d,buffer_cache}: Implement memory barriers using 3D registers
Diffstat (limited to 'src/video_core/engines')
-rw-r--r--src/video_core/engines/maxwell_3d.cpp4
-rw-r--r--src/video_core/engines/maxwell_3d.h5
2 files changed, 8 insertions, 1 deletions
diff --git a/src/video_core/engines/maxwell_3d.cpp b/src/video_core/engines/maxwell_3d.cpp
index 39e3b66a2..7db055ea0 100644
--- a/src/video_core/engines/maxwell_3d.cpp
+++ b/src/video_core/engines/maxwell_3d.cpp
@@ -184,6 +184,10 @@ void Maxwell3D::CallMethod(const GPU::MethodCall& method_call) {
}
switch (method) {
+ case MAXWELL3D_REG_INDEX(wait_for_idle): {
+ rasterizer.WaitForIdle();
+ break;
+ }
case MAXWELL3D_REG_INDEX(shadow_ram_control): {
shadow_state.shadow_ram_control = static_cast<Regs::ShadowRamControl>(method_call.argument);
break;
diff --git a/src/video_core/engines/maxwell_3d.h b/src/video_core/engines/maxwell_3d.h
index 5e522e0d2..864924ff3 100644
--- a/src/video_core/engines/maxwell_3d.h
+++ b/src/video_core/engines/maxwell_3d.h
@@ -709,7 +709,9 @@ public:
union {
struct {
- INSERT_UNION_PADDING_WORDS(0x45);
+ INSERT_UNION_PADDING_WORDS(0x44);
+
+ u32 wait_for_idle;
struct {
u32 upload_address;
@@ -1536,6 +1538,7 @@ private:
static_assert(offsetof(Maxwell3D::Regs, field_name) == position * 4, \
"Field " #field_name " has invalid position")
+ASSERT_REG_POSITION(wait_for_idle, 0x44);
ASSERT_REG_POSITION(macros, 0x45);
ASSERT_REG_POSITION(shadow_ram_control, 0x49);
ASSERT_REG_POSITION(upload, 0x60);