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authorbunnei <bunneidev@gmail.com>2018-11-28 10:12:37 -0500
committerGitHub <noreply@github.com>2018-11-28 10:12:37 -0500
commit6f849887c9e7fa51743809c3a4bcfd2e319dff8d (patch)
treeba26ea7fcb626dacab4b7997149ad52c21ba526c /src/video_core/engines/maxwell_compute.cpp
parent881f5ad70f8500035d6e22000d010b58bfbe93b7 (diff)
parentac74b71d7530452126792c5fa0bf01fe7378ba00 (diff)
Merge pull request #1792 from bunnei/dma-pusher
gpu: Rewrite GPU command list processing with DmaPusher class.
Diffstat (limited to 'src/video_core/engines/maxwell_compute.cpp')
-rw-r--r--src/video_core/engines/maxwell_compute.cpp8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/video_core/engines/maxwell_compute.cpp b/src/video_core/engines/maxwell_compute.cpp
index 8b5f08351..656db6a61 100644
--- a/src/video_core/engines/maxwell_compute.cpp
+++ b/src/video_core/engines/maxwell_compute.cpp
@@ -8,13 +8,13 @@
namespace Tegra::Engines {
-void MaxwellCompute::WriteReg(u32 method, u32 value) {
- ASSERT_MSG(method < Regs::NUM_REGS,
+void MaxwellCompute::CallMethod(const GPU::MethodCall& method_call) {
+ ASSERT_MSG(method_call.method < Regs::NUM_REGS,
"Invalid MaxwellCompute register, increase the size of the Regs structure");
- regs.reg_array[method] = value;
+ regs.reg_array[method_call.method] = method_call.argument;
- switch (method) {
+ switch (method_call.method) {
case MAXWELL_COMPUTE_REG_INDEX(compute): {
LOG_CRITICAL(HW_GPU, "Compute shaders are not implemented");
UNREACHABLE();