diff options
| author | Subv <subv2112@gmail.com> | 2018-04-23 20:03:50 -0500 |
|---|---|---|
| committer | Subv <subv2112@gmail.com> | 2018-04-25 11:55:28 -0500 |
| commit | c16cfbbc6c062491d84a6bc9976027b7a7587fdb (patch) | |
| tree | 469124577a54f93b859ac9f08357bc5479c30b1a /src/video_core/engines/maxwell_3d.cpp | |
| parent | a994446b6ec776c9383e8b13c45eeb461405adff (diff) | |
GPU: Reduce the number of registers of Maxwell3D to 0xE00.
The rest are just macro shim registers.
Diffstat (limited to 'src/video_core/engines/maxwell_3d.cpp')
| -rw-r--r-- | src/video_core/engines/maxwell_3d.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/video_core/engines/maxwell_3d.cpp b/src/video_core/engines/maxwell_3d.cpp index bc40f8d98..4306b894f 100644 --- a/src/video_core/engines/maxwell_3d.cpp +++ b/src/video_core/engines/maxwell_3d.cpp @@ -33,9 +33,6 @@ void Maxwell3D::CallMacroMethod(u32 method, std::vector<u32> parameters) { } void Maxwell3D::WriteReg(u32 method, u32 value, u32 remaining_params) { - ASSERT_MSG(method < Regs::NUM_REGS, - "Invalid Maxwell3D register, increase the size of the Regs structure"); - auto debug_context = Core::System::GetInstance().GetGPUDebugContext(); // It is an error to write to a register other than the current macro's ARG register before it @@ -64,6 +61,9 @@ void Maxwell3D::WriteReg(u32 method, u32 value, u32 remaining_params) { return; } + ASSERT_MSG(method < Regs::NUM_REGS, + "Invalid Maxwell3D register, increase the size of the Regs structure"); + if (debug_context) { debug_context->OnEvent(Tegra::DebugContext::Event::MaxwellCommandLoaded, nullptr); } |
