aboutsummaryrefslogtreecommitdiff
path: root/src/shader_recompiler/frontend/maxwell/translate/impl/double_multiply.cpp
diff options
context:
space:
mode:
authorlat9nq <22451773+lat9nq@users.noreply.github.com>2021-04-05 22:25:22 -0400
committerameerj <52414509+ameerj@users.noreply.github.com>2021-07-22 21:51:26 -0400
commit0bb85f6a753c769266c95c4ba146b25b9eaaaffd (patch)
treee5d818ae7dc1d0025bb115c7a63235d866e53286 /src/shader_recompiler/frontend/maxwell/translate/impl/double_multiply.cpp
parent5cd3d00167b17c1fe36f97da978a7024e93c14e7 (diff)
shader_recompiler,video_core: Cleanup some GCC and Clang errors
Mostly fixing unused *, implicit conversion, braced scalar init, fpermissive, and some others. Some Clang errors likely remain in video_core, and std::ranges is still a pertinent issue in shader_recompiler shader_recompiler: cmake: Force bracket depth to 1024 on Clang Increases the maximum fold expression depth thread_worker: Include condition_variable Don't use list initializers in control flow Co-authored-by: ReinUsesLisp <reinuseslisp@airmail.cc>
Diffstat (limited to 'src/shader_recompiler/frontend/maxwell/translate/impl/double_multiply.cpp')
-rw-r--r--src/shader_recompiler/frontend/maxwell/translate/impl/double_multiply.cpp6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/double_multiply.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/double_multiply.cpp
index 3e83d1c95..4a49299a0 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/double_multiply.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/double_multiply.cpp
@@ -21,9 +21,9 @@ void DMUL(TranslatorVisitor& v, u64 insn, const IR::F64& src_b) {
const IR::F64 src_a{v.ir.FPAbsNeg(v.D(dmul.src_a_reg), false, dmul.neg != 0)};
const IR::FpControl control{
- .no_contraction{true},
- .rounding{CastFpRounding(dmul.fp_rounding)},
- .fmz_mode{IR::FmzMode::None},
+ .no_contraction = true,
+ .rounding = CastFpRounding(dmul.fp_rounding),
+ .fmz_mode = IR::FmzMode::None,
};
v.D(dmul.dest_reg, v.ir.FPMul(src_a, src_b, control));