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| author | bunnei <bunneidev@gmail.com> | 2015-01-02 20:39:36 -0500 |
|---|---|---|
| committer | bunnei <bunneidev@gmail.com> | 2015-01-02 20:39:36 -0500 |
| commit | 6ae381ac9e20b18ee5e90036326df4b8e5837c04 (patch) | |
| tree | 65ff10f61d7615edeb9cb29fe460db442928541a /src/core/arm/interpreter/armemu.cpp | |
| parent | 84856a45493906d2860a004c4b4c85b7cffc7c11 (diff) | |
| parent | bee4ff8454d21644f731703173f449dfeda0fec4 (diff) | |
Merge pull request #388 from lioncash/sm
dyncom: Implement SMLAD/SMUAD/SMLSD/SMUSD
Diffstat (limited to 'src/core/arm/interpreter/armemu.cpp')
| -rw-r--r-- | src/core/arm/interpreter/armemu.cpp | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index 43b1ba40e..12166bf79 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -6470,17 +6470,23 @@ L_stm_s_takeabort: if (BITS(12, 15) != 15) { state->Reg[rd_idx] += state->Reg[ra_idx]; - ARMul_AddOverflowQ(state, product1 + product2, state->Reg[ra_idx]); + if (ARMul_AddOverflowQ(product1 + product2, state->Reg[ra_idx])) + SETQ; } - ARMul_AddOverflowQ(state, product1, product2); + if (ARMul_AddOverflowQ(product1, product2)) + SETQ; } // SMUSD and SMLSD else { state->Reg[rd_idx] = product1 - product2; - - if (BITS(12, 15) != 15) + + if (BITS(12, 15) != 15) { state->Reg[rd_idx] += state->Reg[ra_idx]; + + if (ARMul_AddOverflowQ(product1 - product2, state->Reg[ra_idx])) + SETQ; + } } return 1; |