diff options
| author | Lioncash <mathew1800@gmail.com> | 2015-01-02 18:21:45 -0500 |
|---|---|---|
| committer | Lioncash <mathew1800@gmail.com> | 2015-01-02 18:29:30 -0500 |
| commit | 3337b846204c3d18fde4e28ad1558f5e73532ccc (patch) | |
| tree | 32689d9d8e3c8cb811682c9b025370fa0c332844 /src/core/arm/interpreter/armemu.cpp | |
| parent | 092a67cefbe5aa178b5f9b832fe274bce67f4d10 (diff) | |
dyncom: Implement SMLAD/SMUAD/SMLSD/SMUSD
Diffstat (limited to 'src/core/arm/interpreter/armemu.cpp')
| -rw-r--r-- | src/core/arm/interpreter/armemu.cpp | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp index 43b1ba40e..40e4837d8 100644 --- a/src/core/arm/interpreter/armemu.cpp +++ b/src/core/arm/interpreter/armemu.cpp @@ -6470,10 +6470,12 @@ L_stm_s_takeabort: if (BITS(12, 15) != 15) { state->Reg[rd_idx] += state->Reg[ra_idx]; - ARMul_AddOverflowQ(state, product1 + product2, state->Reg[ra_idx]); + if (ARMul_AddOverflowQ(product1 + product2, state->Reg[ra_idx])) + SETQ; } - ARMul_AddOverflowQ(state, product1, product2); + if (ARMul_AddOverflowQ(product1, product2)) + SETQ; } // SMUSD and SMLSD else { |