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| author | Lioncash <mathew1800@gmail.com> | 2015-12-30 13:56:10 -0500 |
|---|---|---|
| committer | Lioncash <mathew1800@gmail.com> | 2015-12-30 14:23:07 -0500 |
| commit | 532dc797c919b89d061884002b5550f0affdd81a (patch) | |
| tree | 1e84f15d4e724a9371410e7b86e97bb10d741319 /src/core/arm/dyncom/arm_dyncom_dec.cpp | |
| parent | 4bc961d5fd105f894f4f993b693b2496d14dc773 (diff) | |
arm_dyncom_dec: Fix decoding of VMLS
Previously, all VMLS variants would misdecode as CDP
(which isn't necessarily wrong in itself, however
VMLS has it's own label of execution)
Diffstat (limited to 'src/core/arm/dyncom/arm_dyncom_dec.cpp')
| -rw-r--r-- | src/core/arm/dyncom/arm_dyncom_dec.cpp | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom_dec.cpp b/src/core/arm/dyncom/arm_dyncom_dec.cpp index ee4288314..8cd6755cb 100644 --- a/src/core/arm/dyncom/arm_dyncom_dec.cpp +++ b/src/core/arm/dyncom/arm_dyncom_dec.cpp @@ -6,10 +6,9 @@ #include "core/arm/skyeye_common/armsupp.h" const InstructionSetEncodingItem arm_instruction[] = { - { "vmla", 4, ARMVFP2, { 23, 27, 0x1C, 20, 21, 0x0, 9, 11, 0x5, 4, 4, 0 }}, - { "vmls", 7, ARMVFP2, { 28, 31, 0xF, 25, 27, 0x1, 23, 23, 1, 11, 11, 0, 8, 9, 0x2, 6, 6, 1, 4, 4, 0 }}, - { "vnmla", 4, ARMVFP2, { 23, 27, 0x1C, 20, 21, 0x1, 9, 11, 0x5, 4, 4, 0 }}, - { "vnmla", 5, ARMVFP2, { 23, 27, 0x1C, 20, 21, 0x2, 9, 11, 0x5, 6, 6, 1, 4, 4, 0 }}, + { "vmla", 5, ARMVFP2, { 23, 27, 0x1C, 20, 21, 0x0, 9, 11, 0x5, 6, 6, 0, 4, 4, 0 }}, + { "vmls", 5, ARMVFP2, { 23, 27, 0x1C, 20, 21, 0x0, 9, 11, 0x5, 6, 6, 1, 4, 4, 0 }}, + { "vnmla", 5, ARMVFP2, { 23, 27, 0x1C, 20, 21, 0x1, 9, 11, 0x5, 6, 6, 1, 4, 4, 0 }}, { "vnmls", 5, ARMVFP2, { 23, 27, 0x1C, 20, 21, 0x1, 9, 11, 0x5, 6, 6, 0, 4, 4, 0 }}, { "vnmul", 5, ARMVFP2, { 23, 27, 0x1C, 20, 21, 0x2, 9, 11, 0x5, 6, 6, 1, 4, 4, 0 }}, { "vmul", 5, ARMVFP2, { 23, 27, 0x1C, 20, 21, 0x2, 9, 11, 0x5, 6, 6, 0, 4, 4, 0 }}, @@ -211,7 +210,6 @@ const InstructionSetEncodingItem arm_exclusion_code[] = { { "vmla", 0, ARMVFP2, { 0 }}, { "vmls", 0, ARMVFP2, { 0 }}, { "vnmla", 0, ARMVFP2, { 0 }}, - { "vnmla", 0, ARMVFP2, { 0 }}, { "vnmls", 0, ARMVFP2, { 0 }}, { "vnmul", 0, ARMVFP2, { 0 }}, { "vmul", 0, ARMVFP2, { 0 }}, |