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namespace ARMeilleure.Decoders
{
class OpCode32SimdRegElemLong : OpCode32SimdRegElem
{
public OpCode32SimdRegElemLong(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
{
Q = false;
F = false;
RegisterSize = RegisterSize.Simd64;
// (Vd & 1) != 0 || Size == 3 are also invalid, but they are checked on encoding.
if (Size == 0)
{
Instruction = InstDescriptor.Undefined;
}
}
}
}
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