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AgeCommit message (Expand)Author
2018-02-20Split main project into core,graphics and chocolarm4 subproject (#29)emmauss
2018-02-20Add FDIV (vector) instructiongdkchan
2018-02-20Add SMULL (vector), USHR (scalar), FCCMPE, FNMSUB, fixed a some instructionsgdkchan
2018-02-20Misc language usage simplifications (#26)Kurt
2018-02-20Implement Zip1, Zip2 (#25)Merry
2018-02-19Somewhat better scheduler I guessgdkchan
2018-02-18Rename ARegisters to AThreadStategdkchan
2018-02-18Minor cpu fixesgdkchan
2018-02-18Add MLS (vector) instruction, fix mistake introduced on last commitgdkchan
2018-02-18Fix for some SIMD issuesgdkchan
2018-02-17Add FCVTAS and FCVTAU instructionsgdkchan
2018-02-17CPU refactoring - move SIMD (scalar and vector) instructions to separate file...gdkchan
2018-02-15Add some tests (#18)Merry
2018-02-15Shouldn't have undone thisgdkchan
2018-02-15Emit CIL directly for more SIMD instructions, add UCVTF (vector, scalar) and ...gdkchan
2018-02-14AInstEmitAluHelper: Simplify EmitAddsVCheck (#14)Merry
2018-02-14AInstEmitAluHelper: Simplify EmitSubsCCheck (#15)Merry
2018-02-14Add SHRN instruction, and fix ADDVgdkchan
2018-02-13Made initial implementation of the thread scheduler, refactor Svc to avoid pa...gdkchan
2018-02-12Generate CIL for SCVTF (vector), add undefined encodings for some instructionsgdkchan
2018-02-10Only throw undefined instruction exception at execution, not at translation s...gdkchan
2018-02-10Add BRK on the opcode tablegdkchan
2018-02-10Add BRK instruction, fix wrong namespace on one of Am interfaces, and disable...gdkchan
2018-02-09Fixes to memory managementgdkchan
2018-02-09Move a few more SIMD instructions to emit CIL directly instead of a method callgdkchan
2018-02-09Add FVCTZS (fixed point variant) and LD1 (single structure variant) instructionsgdkchan
2018-02-08Merge pull request #2 from gdkchan/direct_memorygdkchan
2018-02-07Fix a copy-paste bug on Ins_Vgdkchan
2018-02-07Add ADC and SBC instructionsgdkchan
2018-02-07Add FMADD and FMSUB instructionsgdkchan
2018-02-07Add FMOV (scalar, register) and FCMPE instructionsgdkchan
2018-02-07Removed parts of the MMU functionality to use memory directly (faster, but po...gdkchan
2018-02-07Implement SSHL instruction, fix exception on FMAX/FMIN, and use a better exce...gdkchan
2018-02-06Support loading NSO/NRO without a MOD0 header, stub some functions, support m...gdkchan
2018-02-06Improve access to system registers by using properties, also use exclusive re...gdkchan
2018-02-04alohagdkchan