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path: root/Ryujinx.Tests/Cpu/PrecomputedThumbTestCase.cs
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2023-04-27Move solution and projects to srcTSR Berry
2022-02-22T32: Implement ALU (shifted register) instructions (#3135)merry
* T32: Implement ADC, ADD, AND, BIC, CMN, CMP, EOR, MOV, MVN, ORN, ORR, RSB, SBC, SUB, TEQ, TST (shifted register) * OpCodeTable: Sort T32 list * Tests: Rename RandomTestCase to PrecomputedThumbTestCase * T32: Tests for AluRsImm instructions * fix nit * fix nit 2