1 files changed, 35 insertions, 0 deletions
diff --git a/src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitNeonBit.cs b/src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitNeonBit.cs
new file mode 100644
index 00000000..9601f4c2
--- /dev/null
+++ b/src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitNeonBit.cs
@@ -0,0 +1,35 @@
+namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
+{
+    static class InstEmitNeonBit
+    {
+        public static void Vcls(CodeGenContext context, uint rd, uint rm, uint size, uint q)
+        {
+            InstEmitNeonCommon.EmitVectorUnary(context, rd, rm, size, q, context.Arm64Assembler.Cls);
+        }
+
+        public static void Vclz(CodeGenContext context, uint rd, uint rm, uint size, uint q)
+        {
+            InstEmitNeonCommon.EmitVectorUnary(context, rd, rm, size, q, context.Arm64Assembler.Clz);
+        }
+
+        public static void Vcnt(CodeGenContext context, uint rd, uint rm, uint size, uint q)
+        {
+            InstEmitNeonCommon.EmitVectorUnary(context, rd, rm, size, q, context.Arm64Assembler.Cnt);
+        }
+
+        public static void Vrev16(CodeGenContext context, uint rd, uint rm, uint size, uint q)
+        {
+            InstEmitNeonCommon.EmitVectorUnary(context, rd, rm, size, q, context.Arm64Assembler.Rev16);
+        }
+
+        public static void Vrev32(CodeGenContext context, uint rd, uint rm, uint size, uint q)
+        {
+            InstEmitNeonCommon.EmitVectorUnary(context, rd, rm, size, q, context.Arm64Assembler.Rev32);
+        }
+
+        public static void Vrev64(CodeGenContext context, uint rd, uint rm, uint size, uint q)
+        {
+            InstEmitNeonCommon.EmitVectorUnary(context, rd, rm, size, q, context.Arm64Assembler.Rev64);
+        }
+    }
+}